learn-fpga
Lifeslice
| learn-fpga | Lifeslice | |
|---|---|---|
| 22 | 2 | |
| 2,337 | 91 | |
| - | - | |
| 7.3 | 10.0 | |
| 19 days ago | almost 9 years ago | |
| C++ | Objective-C | |
| BSD 3-clause "New" or "Revised" License | - |
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Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
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learn-fpga
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FPGA Dev Boards for $150 or Less
I've followed this tutorial recently, and it's amazing:
https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/...
The author includes detailed instruction for how to build a micro-controller in Verilog on an icestick, starting from a very simple blinker all the way to a functional RISC-V core.
My other suggestion would be: for most of the toolchain, skip your package manager and directly install the binary artifacts published on this Github repo:
https://github.com/YosysHQ/oss-cad-suite-build
You'll spare yourself a world of pain.
- Top Ten Fallacies About RISC-V (David Patterson)
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What are the best learning resources for a beginner?
You might want to look at https://github.com/BrunoLevy/learn-fpga
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First FPGA Board
Lattice Icestick is pretty cheap and has just enough LUTs to run a small riscv. Also check out https://github.com/BrunoLevy/learn-fpga
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My first Risc-V core in FPGA
Thanks Bruno Levy
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How to Emulate a CPU on an FPGA
These are good starting points: https://github.com/BrunoLevy/learn-fpga/ and, from there, https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/README.md.
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PicoBlaze in Verilog / Vivado
The best point-of-entry for "tiny" MCUs these days is FemtoRV32-Quark or SERV. I also maintain my own small RISC-V core (Minimax), though it's early on in graduating from "experiment" to "real design".
- looking for ideas for a small project using digilent pmod on xilinx zynq 7 series fpga using hdl (verilog).
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Embedded Systems Weekly #125
Rust blinky on RISC-V soft core If you were looking for, an introduction example of an embedded Rust program, running on a RISC-V soft core, check out this blinky that is using the FemtoRV .
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Minimax: A Compressed-First, Microcoded RISC-V CPU
Nope - that's all there is.
It's possible to be incredibly expressive in Verilog and VHDL. This implementation is written in VHDL, which has an outdated reputation for being long-winded.
Also worth a look: FemtoRV32 Quark [0], which is written in Verilog.
[0]: https://github.com/BrunoLevy/learn-fpga/blob/master/FemtoRV/...
Lifeslice
- Tell HN: Otter.ai bot recording meetings without consent
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Take More Screenshots
https://github.com/wanderingstan/Lifeslice
I developed it as an early Quantified Self tool primarily for the Webcam shots, but also have been saved on more than one occasion by having screenshots of work that would otherwise be lost.
What are some alternatives?
riscv-v-spec - Working draft of the proposed RISC-V V vector extension
wain - WebAssembly implementation from scratch in Safe Rust with zero dependencies
bubbleos
rust-wasm - A simple and spec-compliant WebAssembly interpreter
electron-vlog - Take video recordings, screenshots and time-lapses of your Electron app with ease
openfpga - Open FPGA tools
tropy - Research photo management
flexible-vectors - Vector operations for WebAssembly
wasm-lisp - Experimental Lisp to WebAssembly Compiler
wai - a wasm interpreter written by rust