interpolation
Digital Interpolation Techniques Applied to Digital Signal Processing (by ZipCPU)
riscv
RISC-V CPU Core (RV32IM) (by ultraembedded)
| interpolation | riscv | |
|---|---|---|
| 1 | 2 | |
| 48 | 1,040 | |
| - | - | |
| 3.2 | 1.8 | |
| 4 months ago | over 2 years ago | |
| Verilog | Verilog | |
| - | BSD 3-clause "New" or "Revised" License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
interpolation
Posts with mentions or reviews of interpolation.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Can you explain remez exchange algorithm with example?
My interpolation tutorial has a section of generating interpolation filters using the Remez Exchange algorithm. It starts at about page 39, and has some nice pictures to help illustrate the concept. It's a bit of a different approach from the standard Parks-McClellan approach to Remez, since the tutorial shows the design of an M-band filter rather than a generic lowpass. This puts additional constraints on the filter design, to the point where the Parks-McClellan approximations don't necessarily make sense any more. In other words--it's strictly Remez.
riscv
Posts with mentions or reviews of riscv.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Ultraembedded RISCV Module
I have been trying to execute some instructions to the ultraembedded riscv module https://github.com/ultraembedded/riscv
- I made my own silicon chip: Project Silicon Rider
What are some alternatives?
When comparing interpolation and riscv you can also consider the following projects:
zipcpu - A small, light weight, RISC CPU soft core
biriscv - 32-bit Superscalar RISC-V CPU
cordic - A series of CORDIC related projects
openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
dpll - A collection of phase locked loop (PLL) related projects
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
wbuart32 - A simple, basic, formally verified UART controller
Toast-RV32i - Pipelined RISC-V RV32I Core in Verilog
uhd - The USRP™ Hardware Driver Repository
riscv-cores-list - RISC-V Cores, SoC platforms and SoCs