interpolation
Digital Interpolation Techniques Applied to Digital Signal Processing (by ZipCPU)
biriscv
32-bit Superscalar RISC-V CPU (by ultraembedded)
| interpolation | biriscv | |
|---|---|---|
| 1 | 6 | |
| 48 | 749 | |
| - | - | |
| 3.2 | 0.0 | |
| 4 months ago | over 2 years ago | |
| Verilog | Verilog | |
| - | Apache License 2.0 |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
interpolation
Posts with mentions or reviews of interpolation.
We have used some of these posts to build our list of alternatives
and similar projects.
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Can you explain remez exchange algorithm with example?
My interpolation tutorial has a section of generating interpolation filters using the Remez Exchange algorithm. It starts at about page 39, and has some nice pictures to help illustrate the concept. It's a bit of a different approach from the standard Parks-McClellan approach to Remez, since the tutorial shows the design of an M-band filter rather than a generic lowpass. This puts additional constraints on the filter design, to the point where the Parks-McClellan approximations don't necessarily make sense any more. In other words--it's strictly Remez.
biriscv
Posts with mentions or reviews of biriscv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-06-21.
What are some alternatives?
When comparing interpolation and biriscv you can also consider the following projects:
zipcpu - A small, light weight, RISC CPU soft core
riscv - RISC-V CPU Core (RV32IM)
cordic - A series of CORDIC related projects
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
dpll - A collection of phase locked loop (PLL) related projects
sdspi - SD-Card controller, using either SPI, SDIO, or eMMC interfaces
wbuart32 - A simple, basic, formally verified UART controller
vgasim - A Video display simulator
wbicapetwo - Wishbone to ICAPE interface conversion
RISC-V - Design implementation of the RV32I Core in Verilog HDL with Zicsr extension