RTLDesignSherpa
This site is hopefully a springboard for others to learn about coding in System Verilog and experimenting with FPGAs. (by sean-galloway)
scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog (by syntacore)
RTLDesignSherpa | scr1 | |
---|---|---|
1 | 2 | |
1 | 776 | |
- | 1.4% | |
9.4 | 3.0 | |
2 days ago | 11 days ago | |
SystemVerilog | SystemVerilog | |
BSD 3-clause "New" or "Revised" License | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
RTLDesignSherpa
Posts with mentions or reviews of RTLDesignSherpa.
We have used some of these posts to build our list of alternatives
and similar projects.
scr1
Posts with mentions or reviews of scr1.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-07-04.
-
Looking for a suitable open-source RISC-V for an embedded project
Would this be suitable? https://github.com/syntacore/scr1 I haven't used it, but I saw it in Riscduino project which continues to appear in Open MPWs.
- Mikron MIK32 – Made in Russia 32-bit RISC-V MCU... for about $6
What are some alternatives?
When comparing RTLDesignSherpa and scr1 you can also consider the following projects:
Cores-VeeR-EL2 - VeeR EL2 Core
riscv-simple-sv - A simple RISC V core for teaching
FPGA-Video-Processing - Realtime video processing w/ Gaussian + Sobel Filters targeting Artix-7 FPGA
friscv - RISCV CPU implementation in SystemVerilog
clic - RISC-V fast interrupt controller
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
ibex - Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
Cores-VeeR-EH1 - VeeR EH1 core
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
M2GL025-Creative-Board - Igloo2 M2GL025 Creative Development Board
VeriGPU - OpenSource GPU, in Verilog, loosely based on RISC-V ISA