riscv
psram-tang-nano-9k
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| riscv | psram-tang-nano-9k | |
|---|---|---|
| 2 | 7 | |
| 1,040 | 44 | |
| - | - | |
| 1.8 | 0.0 | |
| over 2 years ago | over 1 year ago | |
| Verilog | Verilog | |
| BSD 3-clause "New" or "Revised" License | Apache License 2.0 |
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riscv
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Ultraembedded RISCV Module
I have been trying to execute some instructions to the ultraembedded riscv module https://github.com/ultraembedded/riscv
- I made my own silicon chip: Project Silicon Rider
psram-tang-nano-9k
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Using the OSS PsramController with both dies
See my reply here: https://github.com/zf3/psram-tang-nano-9k/issues/6
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Open HyperRAM interface for Nano 9K
I added a note about his to the controller's readme. "Quick discussion about going above 83Mhz".
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Gowin: PSRAM unusable on Tang Nano 9K: stuck in Wrapped Burst mode in read and write operations (HyperRAM on Tang Nano 4K works OK with Linear Bursts)
Another difference that I find in that W955D8MBYA data sheet compared to W955N8MBY, is that W955D8MBYA does not mention anywhere that differential signaling would be optional: but instead it marks it as required. If that is the case, then the question for Best Behavior(tm) of how to properly feed it LVDS does rise again. ( https://github.com/zf3/psram-tang-nano-9k/issues/1 )
- An open source PSRAM/HyperRAM controller for Tang Nano 9k
What are some alternatives?
biriscv - 32-bit Superscalar RISC-V CPU
uhd - The USRP™ Hardware Driver Repository
openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
nano4k_hdmi_tx - Open-source HDMI/DVI transmitter for the Gowin GW1NSR-powered Tang Nano 4K
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
serv - SERV - The SErial RISC-V CPU
zipcpu - A small, light weight, RISC CPU soft core
psram-tang-nano-9k - An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA
Toast-RV32i - Pipelined RISC-V RV32I Core in Verilog
open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
corundum - Open source FPGA-based NIC and platform for in-network compute