hdl_checker
tagls
| hdl_checker | tagls | |
|---|---|---|
| 4 | 1 | |
| 185 | 36 | |
| - | - | |
| 0.0 | 10.0 | |
| 10 days ago | almost 2 years ago | |
| Python | Python | |
| GNU General Public License v3.0 only | Apache License 2.0 |
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For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
hdl_checker
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Any better options than Sigasi?
I've written a LSP that uses modelsim, ghdl or Vivado to do error checking: https://github.com/suoto/hdl_checker
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What Editor is Everyone Using for FPGA design? (2021)
NeoVim + CoC + hdl_checker
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VHDL native lsp
As others mentioned, rust_hdl and ghdl ls are worth checking out. If your project has both VHDL and Verilog/SystemVerilog, might be worth checking https://github.com/suoto/hdl_checker (disclaimer, I'm the author). It's got less LS features than the other two but if you use it with modelsim it'll provide mixed language syntax check.
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IDE / Editor of choice
Specifically for HDL-files a lot of progress has been made in the last couple of years on lsp-mode and external LSP servers for code analysis of both VHDL and SystemVerilog. For SV I use the https://github.com/suoto/hdl_checker server that passes the code you are working on live to the Linting engine in Questa/ModelSim and marks the warning lines in the editor. It's nice to get immediate feedback on missing semicolons etc. although it still has a hard time handling large projects.
tagls
What are some alternatives?
completor.vim - Async completion framework made ease.
fortls - fortls - Fortran Language Server
rust_hdl
efm-langserver - General purpose Language Server
veridian - A SystemVerilog Language Server
lsp-examples - Use any language server with YouCompleteMe.
cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
teroshdl-documenter-demo - This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI workflow.
LeaderF - An efficient fuzzy finder that helps to locate files, buffers, mrus, gtags, etc. on the fly for both vim and neovim.
vscode-terosHDL - VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
LSP - Client implementation of the Language Server Protocol for Sublime Text