hdl_checker VS completor.vim

Compare hdl_checker vs completor.vim and see what are their differences.

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hdl_checker completor.vim
4 2
183 1,225
- -
0.0 0.0
4 months ago about 2 months ago
Python Python
GNU General Public License v3.0 only MIT License
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
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Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

hdl_checker

Posts with mentions or reviews of hdl_checker. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-02-23.
  • Any better options than Sigasi?
    2 projects | /r/FPGA | 23 Feb 2022
    I've written a LSP that uses modelsim, ghdl or Vivado to do error checking: https://github.com/suoto/hdl_checker
  • What Editor is Everyone Using for FPGA design? (2021)
    2 projects | /r/FPGA | 28 Jun 2021
    NeoVim + CoC + hdl_checker
  • VHDL native lsp
    1 project | /r/neovim | 24 Jun 2021
    As others mentioned, rust_hdl and ghdl ls are worth checking out. If your project has both VHDL and Verilog/SystemVerilog, might be worth checking https://github.com/suoto/hdl_checker (disclaimer, I'm the author). It's got less LS features than the other two but if you use it with modelsim it'll provide mixed language syntax check.
  • IDE / Editor of choice
    1 project | /r/FPGA | 19 Mar 2021
    Specifically for HDL-files a lot of progress has been made in the last couple of years on lsp-mode and external LSP servers for code analysis of both VHDL and SystemVerilog. For SV I use the https://github.com/suoto/hdl_checker server that passes the code you are working on live to the Linting engine in Questa/ModelSim and marks the warning lines in the editor. It's nice to get immediate feedback on missing semicolons etc. although it still has a hard time handling large projects.

completor.vim

Posts with mentions or reviews of completor.vim. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-07-17.
  • Omnicompletion sucks with the cursor on the end
    8 projects | /r/neovim | 17 Jul 2021
    completor
  • Vim is amazing
    5 projects | /r/vim | 14 May 2021
    When I recently started writing in Rust, I installed a few LSP related stuff and a completer. Try https://github.com/maralla/completor.vim ('maralla/completor.vim'), and you need "jedi" too for Python I think. I don't have it for Python installed, so don't know how well it works.

What are some alternatives?

When comparing hdl_checker and completor.vim you can also consider the following projects:

rust_hdl

deoplete-jedi - deoplete.nvim source for Python

veridian - A SystemVerilog Language Server

YouCompleteMe - A code-completion engine for Vim

cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

coc.nvim - Nodejs extension host for vim & neovim, load extensions like VSCode and host language servers.

teroshdl-documenter-demo - This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI workflow.

deoplete.nvim - :stars: Dark powered asynchronous completion framework for neovim/Vim8

vscode-terosHDL - VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

ale - Check syntax in Vim/Neovim asynchronously and fix files, with Language Server Protocol (LSP) support

edalize - An abstraction library for interfacing EDA tools

completion-nvim - A async completion framework aims to provide completion to neovim's built in LSP written in Lua