verilog-wishbone

Verilog wishbone components (by alexforencich)

Verilog-wishbone Alternatives

Similar projects and alternatives to verilog-wishbone

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a better verilog-wishbone alternative or higher similarity.

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Reviews and mentions

Posts with mentions or reviews of verilog-wishbone. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-09-14.
  • Share some github FPGA projects (bonus if they include C++, Python, or other files)
    reddit.com/r/FPGA | 2021-09-14
    A lot of reuse from other FOSH projects, including Litex, SpinalHDL, betrusted & u/alexforencich verilog-wishbone. Thanks to all of them :-)

Stats

Basic verilog-wishbone repo stats
1
62
1.7
4 months ago

alexforencich/verilog-wishbone is an open source project licensed under MIT License which is an OSI approved license.

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