verilog-wishbone
Verilog wishbone components (by alexforencich)
corundum
Open source FPGA-based NIC and platform for in-network compute (by corundum)
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| verilog-wishbone | corundum | |
|---|---|---|
| 1 | 28 | |
| 98 | 1,460 | |
| - | 3.7% | |
| 0.0 | 9.4 | |
| 4 months ago | 4 months ago | |
| Python | Verilog | |
| MIT License | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
verilog-wishbone
Posts with mentions or reviews of verilog-wishbone.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-09-14.
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Share some github FPGA projects (bonus if they include C++, Python, or other files)
A lot of reuse from other FOSH projects, including Litex, SpinalHDL, betrusted & u/alexforencich verilog-wishbone. Thanks to all of them :-)
corundum
Posts with mentions or reviews of corundum.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2024-03-27.
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FuryGpu – Custom PCIe FPGA GPU
The GPU uses this: https://github.com/alexforencich/verilog-pcie . And there is an open-source 100G NIC here, including open source 10G/25G MACs: https://github.com/corundum/corundum
- Open sourceCorundum – FPGA-based NIC and platform for in-network compute
- TCP checksum computation
- Are there any free/open source Lattice ECP5 Ethernet MAC IP Cores?
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xilinx versal gty testbench/data gen?
Well, I did build this: https://github.com/corundum/corundum
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FPGA for finance industry
I would look into 10GbE PCS/MAC packet processors implemented under AXI Stream interfaces for example. There are open source examples https://github.com/corundum/corundum and https://netfpga.org/ .
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Computer Networking Nerd and EE Student Looking to build a Baremetal Network Driver on top of baremetal kernel? Is this possible and if so, I'd like some guidance!
I built my own 100 Gbps capable NIC, along with driver: https://github.com/corundum/corundum. You're welcome to ask if you have any questions, though it is quite a different animal from a 100 Mbps NIC you might have on a microcontroller.
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Device Drivers for Transceiver Questions (Specifically, PCIe)
If you're looking for resources, here's one rather comprehensive example of a high-performance FPGA design with a fully custom DMA engine and driver, that runs on both Xilinx and Intel FPGAs: https://github.com/corundum/corundum
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shift/concatenate in v/sv
I have no idea, but you're welcome to build the design and look at it yourself: https://github.com/corundum/corundum/tree/master/fpga/mqnic/NetFPGA_SUME/fpga. The barrel shifters are in the DMA engine, both the read DMA and write DMA engines have wide barrel shifters.
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Open source projects?
Dive right into the slack channel and introduce yourself. There is also a new contributor guide. /u/alexforencich/ is on these reddits and he may be able to chime in and give you more concrete suggestions.
What are some alternatives?
When comparing verilog-wishbone and corundum you can also consider the following projects:
litex - Build your hardware, easily!
verilog-ethernet - Verilog Ethernet components for FPGA implementation
rssguard - Feed reader (and podcast player) which supports RSS/ATOM/JSON and many web-based feed services.
soft_riscv - Soft-core RISCV processor for RISCV 2018 competition
NvChad - Blazing fast Neovim config providing solid defaults and a beautiful UI, enhancing your neovim experience.
SpinalHDL - Scala based HDL
BYU_PYNQ_PR_Video_Pipeline - The Demo that was presented at FCCM.
SBusFPGA - Stuff to put a FPGA in a SBus system (SPARCstation)
psram-tang-nano-9k - An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA
verilog-wishbone vs litex
corundum vs verilog-ethernet
verilog-wishbone vs verilog-ethernet
corundum vs rssguard
verilog-wishbone vs soft_riscv
corundum vs NvChad
verilog-wishbone vs SpinalHDL
corundum vs litex
verilog-wishbone vs BYU_PYNQ_PR_Video_Pipeline
corundum vs soft_riscv
verilog-wishbone vs SBusFPGA
corundum vs psram-tang-nano-9k