Verilog wishbone components
Why do you think that https://github.com/AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection is a good alternative to verilog-wishbone
Verilog wishbone components
Why do you think that https://github.com/AngeloJacobo/FPGA_RealTime_and_Static_Sobel_Edge_Detection is a good alternative to verilog-wishbone