riscv-isa-sim
libriscv
riscv-isa-sim | libriscv | |
---|---|---|
15 | 16 | |
2,211 | 411 | |
2.7% | - | |
9.0 | 9.6 | |
5 days ago | 8 days ago | |
C | C++ | |
GNU General Public License v3.0 or later | BSD 3-clause "New" or "Revised" License |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
riscv-isa-sim
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RISC-V simulator
Someone correct me if I'm wrong, but Spike is considered the gold standard for RISV-V simulation, in terms of support for extensions and overall correctness. As I understand it, QEMU is faster and easier to use for day-to-day for general software development.
- Help needed in building cavatools
- GCC 13 Adds RISC-V T-Head Vendor Extension Collection
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Hardware/software to run RISC-V ASM?
Spike is an RISC-V instruction set simulator: https://github.com/riscv-software-src/riscv-isa-sim
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most underrated cpp project you’ve seen?
I really like the source code for the Spike RISC-V ISA Simulator. It's not very heavily commented, though, so you really need to read the code.
- C++17 RISC-V RV32/64/128 userspace emulator library
- Buying RISC-V development board
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Is there a way to run RISCV sim spike on bare metal?
If you want to run bare metal with no RTOS, it should be possible, but you will need to replace the main startup program (https://github.com/riscv-software-src/riscv-isa-sim/blob/master/spike_main/spike.cc) with some program to set up the hardware and instantiate the simulator, load the OS image etc and then have a decent runtime environment to that supports malloc() etc and redirect IO to serial or flash memory etc. There is a bit of work you would need to do.
- switching between privilege levels
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Starting up with RISC-V
I guess you will also use Spike and the Sail model for RISC-V.
libriscv
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Ask HN: Looking for a project to volunteer on? (November 2023)
Seeking: https://github.com/fwsGonzo/libriscv
This is a C++ RISC-V emulator that focuses on isolating a single process, aka userspace emulation. I am currently working mostly on binary translation, and recently I have made a push to move it from experimental state to fully supported. Another experimental feature is embedding libtcc and using that for binary translation. It is fairly fast to compile, and gives decent speedups. The challenge is what to do now that (perhaps) some low hanging fruits have been picked.
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Writing a Tiny RISC-V Emulator [video]
I definitely recommend people to consider the base ISA of RISC-V if they want to try to implement a CPU or even full-system emulation. I understand that implementing a GameBoy emulator might be more attractive because you are working towards something graphical, but you can definitely get something similar with RISC-V, eg. Doom (SDL example: https://github.com/fwsGonzo/libriscv/tree/master/examples/do...)
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MSVC-compatible CMake project
This is the example project: https://github.com/fwsGonzo/libriscv/tree/master/examples/msvc
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MSVC troubles
Pretty much two days of work: https://github.com/fwsGonzo/libriscv/commits/master
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Hacker News top posts: Nov 21, 2022
Show HN: Libriscv – RISC-V userspace emulator library\ (7 comments)
- GitHub - fwsGonzo/libriscv: C++17 RISC-V RV32/64/128 userspace emulator library
- Show HN: C++17 RISC-V RV32/64/128 userspace emulator library
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C++17 RISC-V RV32/64/128 userspace emulator library
There is a doom emulation demo here now: https://github.com/fwsGonzo/libriscv/tree/master/emulator/do...
You will need to add the shareware doom1.wad yourself. :)
What are some alternatives?
sail-riscv - Sail RISC-V model
chrgfx - Converts to and from tile based graphics from retro video game hardware
riscv-arch-test
stduuid - A C++17 cross-platform implementation for UUIDs
rvv-intrinsic-doc
lager - C++ library for value-oriented design using the unidirectional data-flow architecture — Redux for C++
nanoCH32V305
seer - Seer - a gui frontend to gdb
riscv-gnu-toolchain - GNU toolchain for RISC-V, including GCC
nomenus-rex - A CLI utility for the file mass-renaming
qemu
GPU-Raytracer - GPU Raytracer from scratch in C++/CUDA