Is there a way to run RISCV sim spike on bare metal?

• jailhouse

  3 1,668 0.0 C

  Linux-based partitioning hypervisor

  

You could run it inside something like jailhouse hypervisor (https://github.com/siemens/jailhouse) if you want to give it direct dedicated "baremetal" access to hardware. You could do this inside of a buildroot linux image. This would need a customized simulator.

• buildroot

  51 2,491 10.0 Makefile

  Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.

  

You could integrate spike easily into a custom buildroot linux image (https://buildroot.org/) and make it boot directly into spike and run whatever software image you would like to run. This would work on an ARM/RISC-V linux capable SBC or x86 PC. You would not need to change the source code. A POSIX-capable RTOS should be able to do the same thing.

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• riscv-isa-sim

  15 2,191 9.0 C

  Spike, a RISC-V ISA Simulator

  

If you want to run bare metal with no RTOS, it should be possible, but you will need to replace the main startup program (https://github.com/riscv-software-src/riscv-isa-sim/blob/master/spike_main/spike.cc) with some program to set up the hardware and instantiate the simulator, load the OS image etc and then have a decent runtime environment to that supports malloc() etc and redirect IO to serial or flash memory etc. There is a bit of work you would need to do.

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