RISC-V simulator

This page summarizes the projects mentioned and recommended in the original post on /r/RISCV

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  • toolchain

    I am developing the risc-v simulator (https://gitlab.com/quantr/toolchain/riscv-simulator), we record every instructions+registers that qemu execute and compare them to ours. Is there any other way to cross-check the correctness of the execution of our simulator?

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  • riscv-isa-sim

    Spike, a RISC-V ISA Simulator

    Someone correct me if I'm wrong, but Spike is considered the gold standard for RISV-V simulation, in terms of support for extensions and overall correctness. As I understand it, QEMU is faster and easier to use for day-to-day for general software development.

  • riscv-formal

    RISC-V Formal Verification Framework

    You might be able to hook up your simulator to risc v-formal https://github.com/SymbioticEDA/riscv-formal

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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