Top 10 C++ Riscv Projects

ncnn

12 19,125 9.4 C++

ncnn is a high-performance neural network inference framework optimized for the mobile platform

Project mention: AMD Funded a Drop-In CUDA Implementation Built on ROCm: It's Open-Source | news.ycombinator.com | 2024-02-12

ncnn uses Vulkan for GPU acceleration, I've seen it used in a few projects to get AMD hardware support.
https://github.com/Tencent/ncnn

libriscv

16 402 9.7 C++

C++20 RISC-V RV32/64/128 userspace emulator library

Project mention: Ask HN: Looking for a project to volunteer on? (November 2023) | news.ycombinator.com | 2023-11-02

Seeking: https://github.com/fwsGonzo/libriscv
This is a C++ RISC-V emulator that focuses on isolating a single process, aka userspace emulation. I am currently working mostly on binary translation, and recently I have made a push to move it from experimental state to fully supported. Another experimental feature is embedding libtcc and using that for binary translation. It is fairly fast to compile, and gives decent speedups. The challenge is what to do now that (perhaps) some low hanging fruits have been picked.

InfluxDB

www.influxdata.com sponsored

Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.
rvscript

8 214 8.4 C++

Fast RISC-V-based scripting backend for game engines

Project mention: Fast RISC-V-based scripting back end for game engines | news.ycombinator.com | 2024-01-14

lnDSO150

2 46 6.7 C++

Newer alternative firmware for the DSO150/DSO shell small oscilloscope
gd32vf103inator

1 44 0.0 C++

Program the GD32VF103 using C, your favourite editor and make
PERCIVAL

1 40 3.3 C++

Open-Source Posit RISC-V Core with Quire Capability (by artecs-group)
atomicx

1 13 0.0 C++

Pure C++ non stack displacement that implements cooperative multitask library for SINGLE CORE embedded development on DSPs, Microcontrollers and Processor (ARV, RISCV, ARM(all), TENSY, ESP), while also suitable for applications on Windows, Linux and MacOs and compatible with some RTOSs as well. This library allows full event driven applications while uses SMARTs LOCKS and WAIT/NOTIFY locks to also transport messages, MESSAGE BROKER is also provided (Those uses Message type size_t message and si
WorkOS

workos.com sponsored

The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.
vegadude

1 5 6.1 C++

Utility to program CDAC VEGA microprocessor powered boards

Project mention: Embedded Systems Projects | /r/developersIndia | 2023-05-30

Hi, I'm a first year college student interested in embedded systems. Some projects 1 2 I have been working on. My questions are:

cs2410

1 3 6.5 C++

An out-of-order execution CPU simulator for CS2410 Computer Architecture course final project at the University of Pittsburgh.

Project mention: Sophie Wilson. She designed the architecture behind your phone’s CPU. She is also a trans woman. | /r/pics | 2023-05-24

Here is a CPU simulator that I made during the Spring semester, which implements a subset of the RISC V ISA. :)

PeakRDL-halcpp

2 3 6.0 C++

C++ 17 Hardware abstraction layer generator from systemrdl

Project mention: Help with template parameter packs | /r/cpp_questions | 2023-05-08

It's an open source project, so its not my homework :)https://github.com/Risto97/PeakRDL-halcpp

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020). The latest post mention was on 2024-02-12.