riscv-dv
Random instruction generator for RISC-V processor verification (by chipsalliance)
riscv-cores-list
RISC-V Cores, SoC platforms and SoCs (by riscvarchive)
| riscv-dv | riscv-cores-list | |
|---|---|---|
| 6 | 4 | |
| 952 | 564 | |
| 1.4% | - | |
| 5.2 | 1.8 | |
| about 2 months ago | about 3 years ago | |
| Python | ||
| Apache License 2.0 | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
riscv-dv
Posts with mentions or reviews of riscv-dv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-04-03.
-
Do Necessary Tools Exist For RISC-V Verification?
Instruction generator and fuzzer https://github.com/chipsalliance/riscv-dv
- Google's Riscv-DV throwing odd errors
-
Looking for a RISC-V core for verification
I'd repurpose one of the smallest risc-v cores you can find and couple it with https://github.com/google/riscv-dv which generates random instruction streams for testing.
- Areas to contribute in RISC-V RTL verification
- Show HN: Random instruction generator for RISC-V processor verification
riscv-cores-list
Posts with mentions or reviews of riscv-cores-list.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-04-12.
- TechTechPotato (Dr Ian Cutress): "Building High-Performance RISC-V Cores for Everything"
-
RISCV IP Cores Overview
That info used to be on GitHub: https://github.com/riscvarchive/riscv-cores-list, it's a shame that the riscv.org site moved away from maintaining the information in a public repository.
-
Looking for a RISC-V core for verification
I'm planning to start my Master's thesis on RISC-V verification, so I'm looking for a core that I can use to simulate. I came across this list of cores on github and out of these which would you recommend is ideal for my application. I have only worked on ARM cores before in my internship so the designs were already set up by the company there, but now I am having trouble doing this on my own. I decided to go with the Hummingbirdv2 e203 core as I have experience with verilog, but I am unable to even simulate the test code because of some syntax error. Is there someone who has experience using this core before or can recommend some other core that is straightforward with the setup?
-
Capital required to design and manufacture smartphones/computers in US
There are 108 RISC-V cores that have been created so far (according to this list), but only a couple are 64 bit, open source and powerful enough that you would want to use them (like Shakti, CVA6 and NutShell)
What are some alternatives?
When comparing riscv-dv and riscv-cores-list you can also consider the following projects:
sail-riscv - Sail RISC-V model
clash-ghc - Haskell to VHDL/Verilog/SystemVerilog compiler
force-riscv - Instruction Set Generator initially contributed by Futurewei
serv - SERV - The SErial RISC-V CPU
litmus-tests-riscv - RISC-V architecture concurrency model litmus tests
cva6 - The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
renode - Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems
riscv - RISC-V CPU Core (RV32IM)
riscv-config - RISC-V Configuration Validator
Cores-VeeR-EH1 - VeeR EH1 core
sby - SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
riscv-cores-list - RISC-V Cores, SoC platforms and SoCs
riscv-dv vs sail-riscv
riscv-cores-list vs clash-ghc
riscv-dv vs force-riscv
riscv-cores-list vs serv
riscv-dv vs litmus-tests-riscv
riscv-cores-list vs cva6
riscv-dv vs renode
riscv-cores-list vs riscv
riscv-dv vs riscv-config
riscv-cores-list vs Cores-VeeR-EH1
riscv-dv vs sby
riscv-cores-list vs riscv-cores-list