riscv-cores-list
RISC-V Cores, SoC platforms and SoCs (by riscvarchive)
riscv-cores-list
RISC-V Cores, SoC platforms and SoCs (by riscv)
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riscv-cores-list | riscv-cores-list | |
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4 | 5 | |
564 | 474 | |
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1.8 | 6.0 | |
about 3 years ago | about 3 years ago | |
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The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
riscv-cores-list
Posts with mentions or reviews of riscv-cores-list.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-04-12.
- TechTechPotato (Dr Ian Cutress): "Building High-Performance RISC-V Cores for Everything"
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RISCV IP Cores Overview
That info used to be on GitHub: https://github.com/riscvarchive/riscv-cores-list, it's a shame that the riscv.org site moved away from maintaining the information in a public repository.
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Looking for a RISC-V core for verification
I'm planning to start my Master's thesis on RISC-V verification, so I'm looking for a core that I can use to simulate. I came across this list of cores on github and out of these which would you recommend is ideal for my application. I have only worked on ARM cores before in my internship so the designs were already set up by the company there, but now I am having trouble doing this on my own. I decided to go with the Hummingbirdv2 e203 core as I have experience with verilog, but I am unable to even simulate the test code because of some syntax error. Is there someone who has experience using this core before or can recommend some other core that is straightforward with the setup?
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Capital required to design and manufacture smartphones/computers in US
There are 108 RISC-V cores that have been created so far (according to this list), but only a couple are 64 bit, open source and powerful enough that you would want to use them (like Shakti, CVA6 and NutShell)
riscv-cores-list
Posts with mentions or reviews of riscv-cores-list.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Navi 23 Die (Dimgrey Cavefish) - 237 mm², 11.06BT, TSMC 7nm, 32 CUs, 32 MB IC, 128-bit, PCIe 4.0
For example, the fastest open source RISC-V designs are written with SpinaldHDL or Chisel, rather than a lesser abstracted language like VHDL or (System)Verilog.
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SiFive 21G1 Webinar...
I note that https://github.com/riscv/riscv-cores-list is now archived, and https://riscv.org/risc-v-cores/ is now 404'd...
- Hey guys, I would like to start some project using a RISC-V core. I already extended a RISC-V core by an AXI-based security accelerator. Now I am looking for something new... Do you have some ideas?
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Pine64 unveils RK3566-powered SBC and reveals an upcoming RISC-V board
Is it open source? i read articles saying it will be open source but here (the risc-v foundation wiki) it appears under a commercial license, i also don't see it on the alibaba github.
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Ayuda!
Posting in English would help. Also stating what your purpose is in general helps, otherwise you get generic answers like download one here and burn it into a fpga.
What are some alternatives?
When comparing riscv-cores-list and riscv-cores-list you can also consider the following projects:
clash-ghc - Haskell to VHDL/Verilog/SystemVerilog compiler
cva6 - The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
serv - SERV - The SErial RISC-V CPU
OpenLANE-Sky130-Physical-Design-Workshop - Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
riscv - RISC-V CPU Core (RV32IM)
Cores-VeeR-EH1 - VeeR EH1 core
riscv-dv - Random instruction generator for RISC-V processor verification
NutShell - RISC-V SoC designed by students in UCAS
riscv-boom - SonicBOOM: The Berkeley Out-of-Order Machine
riscv-cores-list vs clash-ghc
riscv-cores-list vs cva6
riscv-cores-list vs serv
riscv-cores-list vs OpenLANE-Sky130-Physical-Design-Workshop
riscv-cores-list vs cva6
riscv-cores-list vs riscv
riscv-cores-list vs Cores-VeeR-EH1
riscv-cores-list vs riscv-dv
riscv-cores-list vs NutShell
riscv-cores-list vs OpenLANE-Sky130-Physical-Design-Workshop
riscv-cores-list vs riscv-boom