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I'm planning to start my Master's thesis on RISC-V verification, so I'm looking for a core that I can use to simulate. I came across this list of cores on github and out of these which would you recommend is ideal for my application. I have only worked on ARM cores before in my internship so the designs were already set up by the company there, but now I am having trouble doing this on my own. I decided to go with the Hummingbirdv2 e203 core as I have experience with verilog, but I am unable to even simulate the test code because of some syntax error. Is there someone who has experience using this core before or can recommend some other core that is straightforward with the setup?
I'd repurpose one of the smallest risc-v cores you can find and couple it with https://github.com/google/riscv-dv which generates random instruction streams for testing.
SweRV EH1 comes with a verilator testbench that can run compiled instructions. You'll need to expand on it if you want things like external memory etc.