riscv-dv
Random instruction generator for RISC-V processor verification (by chipsalliance)
renode
Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems (by renode)
| riscv-dv | renode | |
|---|---|---|
| 6 | 3 | |
| 952 | 1,415 | |
| 1.4% | 2.5% | |
| 5.2 | 9.9 | |
| about 2 months ago | 4 days ago | |
| Python | RobotFramework | |
| Apache License 2.0 | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
riscv-dv
Posts with mentions or reviews of riscv-dv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-04-03.
-
Do Necessary Tools Exist For RISC-V Verification?
Instruction generator and fuzzer https://github.com/chipsalliance/riscv-dv
- Google's Riscv-DV throwing odd errors
-
Looking for a RISC-V core for verification
I'd repurpose one of the smallest risc-v cores you can find and couple it with https://github.com/google/riscv-dv which generates random instruction streams for testing.
- Areas to contribute in RISC-V RTL verification
- Show HN: Random instruction generator for RISC-V processor verification
renode
Posts with mentions or reviews of renode.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-04-03.
-
Emulating IoT Firmware Made Easy: Start Hacking Without the Physical Device
qemu is fine if the IoT device only runs Linux; may want to look into something like https://renode.io/ for a more comprehensive approach.
-
Looking for Open Source Emulators or Simulators for Embedded Systems Development on Ubuntu OS
If you're open to using Zephyr RTOS for your project, I've heard Renode is a fantastic option. https://renode.io/
-
Do Necessary Tools Exist For RISC-V Verification?
Renode https://github.com/renode/renode
What are some alternatives?
When comparing riscv-dv and renode you can also consider the following projects:
sail-riscv - Sail RISC-V model
gem5 - The official repository for the gem5 computer-system architecture simulator.
force-riscv - Instruction Set Generator initially contributed by Futurewei
PlatformIO - Your Gateway to Embedded Software Development Excellence :alien:
litmus-tests-riscv - RISC-V architecture concurrency model litmus tests
riscv-formal - RISC-V Formal Verification Framework
riscv-config - RISC-V Configuration Validator
sby - SymbiYosys (sby) -- Front-end for Yosys-based formal verification flows
riscv-cores-list - RISC-V Cores, SoC platforms and SoCs
rt-thread - RT-Thread is an open source IoT real-time operating system (RTOS).
tock - A secure embedded operating system for microcontrollers