libsv
FPGA-Video-Processing
libsv | FPGA-Video-Processing | |
---|---|---|
2 | 1 | |
19 | 20 | |
- | - | |
3.6 | 0.0 | |
about 2 years ago | over 2 years ago | |
SystemVerilog | SystemVerilog | |
MIT License | - |
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libsv
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Skid Buffer
https://github.com/bensampson5/libsv/blob/main/libsv/fifos/skid_buffer.svhttps://libsv.readthedocs.io/en/latest/skid_buffer.html
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What should a modern IP library look like?
If you're interested in checking that out here's the link to the GitHub page for LibSV: https://github.com/bensampson5/libsv.
FPGA-Video-Processing
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RGB to Grayscale Conversion
I did a similar project in Verilog, and I was able to get pretty good results by using bit-shifts.
What are some alternatives?
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
scr1 - SCR1 is a high-quality open-source RISC-V MCU core in Verilog
DFHDL - DFiant HDL (DFHDL): A Dataflow Hardware Descripition Language
projf-explore - Project F brings FPGAs to life with exciting open-source designs you can build on.
ibex - Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
KinnowCPU - CPU implementing the Limn2600 architecture.
cheshire - A minimal Linux-capable 64-bit RISC-V SoC built around CVA6
deepsocflow - An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
ulm-on-ice - ULM (Ulm Lecture Machine) on ice40
opentitan - OpenTitan: Open source silicon root of trust
riscv-simple-sv - A simple RISC V core for teaching