What should a modern IP library look like?

This page summarizes the projects mentioned and recommended in the original post on reddit.com/r/FPGA

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  • fusesoc

    Package manager and build abstraction tool for FPGA/ASIC development

    Have to correct this slightly: I just heard of my first HDL package manager in this thread. FuseSOC: https://github.com/olofk/fusesoc - Thanks u/gac_cag!

  • oh

    Verilog library for ASIC and FPGA designers (by aolofsson)


  • InfluxDB

    Access the most powerful time series database as a service. Ingest, store, & analyze all types of time series data in a fully-managed, purpose-built database. Keep data forever with low-cost storage and superior data compression.

  • VHDL_Lib

    Library of VHDL components that are useful in larger designs.


  • libsv

    An open source, parameterized SystemVerilog digital hardware IP library

    If you're interested in checking that out here's the link to the GitHub page for LibSV: https://github.com/bensampson5/libsv.

  • opentitan

    OpenTitan: Open source silicon root of trust

    https://github.com/lowRISC/opentitan - OpenTitan an Open Source root of Trust

  • ibex

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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