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All signals are by default internal in qsys if you don't explicitly export them. So, if you want something out of the FPGA e.g. GPIO/LED you must export them. The column named export in qsys makes the signals appear in input/output ports of the module instance so that you can put them in top module i/o and assign pin locations using assignment editor. Partially explained here: https://github.com/zangman/de10-nano/blob/eef52965cba1386c441b738010e149589b8a0ed5/docs/Simple-Hardware-Adder_-Wiring-the-components.md
As far as I remember Xfce image from terasic do not even need device tree entry to access the FPGA portion. I was able to read/write to a custom blockram in FPGA via mmap function in linux without modifying the device tree. I do not suggest this but the Cpp code I have used was similar to this: https://github.com/robseb/LinuxVSCppFPGA/blob/master/HPSbrigeDemo/main.cpp
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