Fusesoc Alternatives

Similar projects and alternatives to fusesoc

• edalize

  2 500 8.6 Python fusesoc VS edalize

  An abstraction library for interfacing EDA tools

• litex

  1 2,045 9.3 C fusesoc VS litex

  Build your hardware, easily!

• InfluxDB

  www.influxdata.com

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• opentitan

  2 1,749 10.0 SystemVerilog fusesoc VS opentitan

  OpenTitan: Open source silicon root of trust

  

• cocotb

  - 1,302 9.4 Python fusesoc VS cocotb

  cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

  

• serv

  1 941 6.1 Verilog fusesoc VS serv

  SERV - The SErial RISC-V CPU

• viv-prj-gen

  3 19 0.0 CMake fusesoc VS viv-prj-gen

  tcl scripts used to build or generate vivado projects automatically

• VHDL_Lib

  1 183 10.0 VHDL fusesoc VS VHDL_Lib

  Library of VHDL components that are useful in larger designs.

• Sonar

  www.sonarsource.com

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• rocket-chip

  - 2,538 5.5 Scala fusesoc VS rocket-chip

  Rocket Chip Generator

  

• axi

  1 642 6.2 SystemVerilog fusesoc VS axi

  AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

  

• hdl

  1 1,114 8.2 Verilog fusesoc VS hdl

  HDL libraries and projects

  

• chisel

  1 2,968 9.6 Scala fusesoc VS chisel

  Chisel: A Modern Hardware Design Language (by chipsalliance)

  

• ghdl

  1 1,866 9.9 VHDL fusesoc VS ghdl

  VHDL 2008/93/87 simulator

  

• neorv32

  1 1,097 9.6 VHDL fusesoc VS neorv32

  🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

• ibex

  1 943 8.0 SystemVerilog fusesoc VS ibex

  Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

  

• oh

  1 909 7.9 Verilog fusesoc VS oh

  Verilog library for ASIC and FPGA designers (by aolofsson)

• basejump_stl

  1 339 6.4 Verilog fusesoc VS basejump_stl

  BaseJump STL: A Standard Template Library for SystemVerilog

  

• satcat5

  1 216 0.0 VHDL fusesoc VS satcat5

  SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.

  

• Free-Range-VHDL-book

  1 173 0.0 TeX fusesoc VS Free-Range-VHDL-book

  Latex source files of the open-source book FREE RANGE VHDL

• de10-nano

  1 124 7.8 Shell fusesoc VS de10-nano

  Absolute beginner's guide to the de10-nano

• blinky

  1 112 4.2 Tcl fusesoc VS blinky

  Example LED blinking project for your FPGA dev board of choice (by fusesoc)

  

• SaaSHub

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