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f4pga | litex | |
---|---|---|
6 | 29 | |
314 | 2,683 | |
5.4% | - | |
1.9 | 9.7 | |
3 days ago | 2 days ago | |
Python | C | |
Apache License 2.0 | GNU General Public License v3.0 or later |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
f4pga
- Show HN: Atopile – Design circuit boards with code
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AMD Proposes an FPGA Subsystem User-Space Interface for Linux
I hope AMD sees the light and helps F4FPGA develop a more complete open source toolchain for their FGPAs (https://f4pga.org). With this subsystem and an open source compilation flow, FGPA experiments would be way easier.
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
I tried to get LiteX to work with F4PGA, an open source FPGA toolchain, instead of the Xilinx tools, but it was a huge hassle. Just use LiteX with the Xilinx tools.
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Running Linux on Xilinx / AMD FPGA Softcore Example Design
Not really, at least not apples-apples for something like a Pi.
There are a couple of different aspects to this, one is that soft-logic it typically slower than hard-logic so you just can't get comparable frequencies out of a soft implementation. For datapath designs, this is typically solved by going wider, but that isn't quite as helpful or practical for all aspects of a processor implemented in soft logic.
If you look at the specs for this softcore processor, they have much less performance than a Pi, even when you're using some of the biggest and more $$ families of FPGAs: https://www.xilinx.com/products/design-tools/microblaze.html....
I'd say that is on-part with similar complexity soft-core CPUs from other vendors or even open-source ones.
With respect to the design transparency, it kind of depends on how much you care about the black-box compilers required to use a lot of these advanced chips. You can feed open-source RTL into them, but there's still a proprietary black-box compiler/fitter/place-route etc for a lot of these.
There's some work toward open toolchains from yosys and https://f4pga.org/, but none of the big FPGA companies seem very bought-in or willing to help a, so it's been a community best-effort, and for some of the fancier devices, you still have to use the proprietary tools to build bitstreams.
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Newbie's complaints about Xilinx software
I am a believer that the open source days will come: https://f4pga.org/
- Symbiflow: The GCC of the FPGA World
litex
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FPGA Dev Boards for $150 or Less
https://github.com/enjoy-digital/litex
they have tutorials, you can get compatible boards for around $20
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
With LiteX you can synthesize a VexRiscV processor. You can run Linux on it. The toolchain is pretty easy to use, as long as you use Xilinx Vivado to compile to gateware.
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Sunset TCL scripts ?
LiteX is a great example of a Python-first flow. However, they have chosen not to subordinate the scripting environment to a GUI toolchain - EDA vendors are unlikely to choose the same trade.
- synthesizing and using the Ibex RISC-V core
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Been messing around with litex and migen on my Tang Primer 20K
To lean these: https://github.com/enjoy-digital/litex, https://github.com/m-labs/migen
- CPU design for college project
- How can I learn about RISC-V and use case? I want to do a project for begginers
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How Much Would It Cost For A Truly Open Source RISC-V SOC?
If you use LiteX to generate a VexRiscV system-on-a-chip, you can include an open source DDR DRAM PHY. This works on Xilinx Spartan-6, Spartan7Artix7/Kintex7/Virtex7 FPGAs, and Lattice ECP5 FPGAs. DDR/LPDDR/DDR2/DDR3 depending on the FPGA.
- LiteX: Build Hardware Easily
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Using FPGAs for computations as a beginner
I am interested in trying out FPGAs for the purpose of running specific calculations more efficiently. Since the calculations themselves are quite complex, I would need to be able to program in a relatively high-level language. I've seen that designing SoC in Python is possible, for example with Litex (https://github.com/enjoy-digital/litex) or Amaranth (https://github.com/amaranth-lang/). I don't want to spend hundreds of hours learning about FPGAs, but I'm prepared to take on a challenge.
What are some alternatives?
icestorm - Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
nmigen-tutorial - A tutorial for using nmigen
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
SpinalHDL - Scala based HDL
f4pga-arch-defs - FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
docs - Documentation site
SaxonSoc - SoC based on VexRiscv and ICE40 UP5K
prjtrellis - Documenting the Lattice ECP5 bit-stream format.
openwifi - open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
atopile - Design circuit boards with code! ✨ Get software-like design reuse 🚀, validation, version control and collaboration in hardware; starting with electronics ⚡️
verilog-ethernet - Verilog Ethernet components for FPGA implementation