edalize
zerosoc
edalize | zerosoc | |
---|---|---|
4 | 2 | |
593 | 49 | |
- | - | |
7.2 | 7.2 | |
8 days ago | about 1 month ago | |
Python | SystemVerilog | |
BSD 2-clause "Simplified" License | - |
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edalize
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Dropping EDA-GUI's 101
Check out FuseSoC: https://github.com/olofk/fusesoc which can handle Vivado builds for you (utilizing edalize: https://github.com/olofk/edalize) along with some nice package management. It can run against multiple tools so you can also get it to build simulations using Verilator or a commercial EDA tool if you have access to them.
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Introduction to FPGAs
Check out https://github.com/olofk/fusesoc. It gives you a command line build flow that can drive Vivado (along with many other eda tools via edalize https://github.com/olofk/edalize) without having to touch the GUI (though you might want it for programming the board, though FuseSoC can do that too).
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Compiling Code into Silicon
This reminds me very much of edalize[1], which does something very similar.
[1]: https://github.com/olofk/edalize
- Olof Kindgren on LinkedIn: We have a new world record! 6000 RISC-V cores in a single chip!
zerosoc
What are some alternatives?
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
skywater-pdk - Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
freepdk-45nm - ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen
apio - :seedling: Open source ecosystem for open FPGA boards
myhdl - The MyHDL development repository
icestudio - :snowflake: Visual editor for open FPGA boards
gssi - Stuff I worked on while at GSSI (L'Aquila, Italy)
rggen - Code generation tool for control and status registers
chisel - Chisel: A Modern Hardware Design Language