airisc_core_complex
Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors. (by Fraunhofer-IMS)
biriscv
32-bit Superscalar RISC-V CPU (by ultraembedded)
airisc_core_complex | biriscv | |
---|---|---|
1 | 6 | |
71 | 749 | |
- | - | |
4.8 | 0.0 | |
6 months ago | over 2 years ago | |
Verilog | Verilog | |
GNU General Public License v3.0 or later | Apache License 2.0 |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
airisc_core_complex
Posts with mentions or reviews of airisc_core_complex.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-11-10.
biriscv
Posts with mentions or reviews of biriscv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-06-21.