SDRAM_Controller_Verilog VS open-fpga-verilog-tutorial

Compare SDRAM_Controller_Verilog vs open-fpga-verilog-tutorial and see what are their differences.

SDRAM_Controller_Verilog

This SDRAM controller is for MT48LC32M16 SDRAM. This module was designed under the assumption that the clock rate is 100MHz. (by RichardPar)
Verilog mt48lc32m16 sdram
Source Code
Suggest alternative
Edit details

open-fpga-verilog-tutorial

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools (by Obijuan)
Verilog icestorm Linux lattice fpgawars openfpga Fpga
Source Code
Suggest alternative
Edit details
InfluxDB - Power Real-Time Data Analytics at Scale
Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.
www.influxdata.com
featured
SaaSHub - Software Alternatives and Reviews
SaaSHub helps you find the best software and product alternatives
www.saashub.com
featured
SDRAM_Controller_Verilog open-fpga-verilog-tutorial
- 3
4 743
- -
0.0 0.0
about 3 years ago about 4 years ago
Verilog Verilog
- GNU General Public License v3.0 only
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

SDRAM_Controller_Verilog

Posts with mentions or reviews of SDRAM_Controller_Verilog. We have used some of these posts to build our list of alternatives and similar projects.

We haven't tracked posts mentioning SDRAM_Controller_Verilog yet.
Tracking mentions began in Dec 2020.

open-fpga-verilog-tutorial

Posts with mentions or reviews of open-fpga-verilog-tutorial. We have used some of these posts to build our list of alternatives and similar projects.
  • FPGA for beginners?
    1 project | /r/beneater | 2 Oct 2022
    The toolchain is called Icestorm, main tool is yosys, most information will be in English. I started with this tutorials here (also in English) https://github.com/Obijuan/open-fpga-verilog-tutorial. Then I used books to learn more on the basics of cpu design in verilog (which can also found online). Obijuan is a Spanish profesor teaching digital electronics in university, he lead the development of a graphical user interface to generate verilog based on a blocks UI, which helps design circuits when you are starting, but unfortunately I believe all his videos are in Spanish, I'd suggest you give it a try even if you don't understand English, as the material available (wiki and videos) is very good. Look for "fpgawars jedi academy " and IceStudio (the tool). But in the end, I personally felt limited by the GUI tool (which was still under heavy development at the time) and went straight to code the verilog code by hand (which obviously is more flexible). Anyway I feel there are not that many pattern to know.
  • What's the difference between FPGA, RISC-V, Arduino?
    1 project | /r/RISCV | 22 Apr 2021
    Among your choices, FPGA is the answer. I would suggest a cheap iCE40 board like the iCESugar, to get started. Then follow tutorials targetting ice40+open stack.
  • Digital Design for FPGAs, with free tools
    1 project | news.ycombinator.com | 14 Feb 2021

What are some alternatives?

When comparing SDRAM_Controller_Verilog and open-fpga-verilog-tutorial you can also consider the following projects:

FPGA_SDRAM_Controller - SDRAM controller optimized to a memory bandwidth of 316MB/s

icestudio - :snowflake: Visual editor for open FPGA boards

darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

apio - :seedling: Open source ecosystem for open FPGA boards

uhd - The USRP™ Hardware Driver Repository

FPGA_Asynchronous_FIFO - FIFO implementation with different clock domains for read and write.

NTHU-ICLAB - 清華大學 | 積體電路設計實驗 (IC LAB) | 110上

psram-tang-nano-9k - An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA

hdl - HDL libraries and projects

cpu11 - Revengineered ancient PDP-11 CPUs, originals and clones

zipcpu - A small, light weight, RISC CPU soft core

SDRAM_Controller_Verilog vs FPGA_SDRAM_Controller open-fpga-verilog-tutorial vs icestudio SDRAM_Controller_Verilog vs darkriscv open-fpga-verilog-tutorial vs apio open-fpga-verilog-tutorial vs uhd open-fpga-verilog-tutorial vs FPGA_Asynchronous_FIFO open-fpga-verilog-tutorial vs NTHU-ICLAB open-fpga-verilog-tutorial vs darkriscv open-fpga-verilog-tutorial vs psram-tang-nano-9k open-fpga-verilog-tutorial vs hdl open-fpga-verilog-tutorial vs cpu11 open-fpga-verilog-tutorial vs zipcpu