open-fpga-verilog-tutorial
cpu11
| open-fpga-verilog-tutorial | cpu11 | |
|---|---|---|
| 3 | 2 | |
| 743 | 147 | |
| - | - | |
| 0.0 | 5.3 | |
| about 4 years ago | 5 months ago | |
| Verilog | Verilog | |
| GNU General Public License v3.0 only | GNU General Public License v3.0 or later |
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open-fpga-verilog-tutorial
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FPGA for beginners?
The toolchain is called Icestorm, main tool is yosys, most information will be in English. I started with this tutorials here (also in English) https://github.com/Obijuan/open-fpga-verilog-tutorial. Then I used books to learn more on the basics of cpu design in verilog (which can also found online). Obijuan is a Spanish profesor teaching digital electronics in university, he lead the development of a graphical user interface to generate verilog based on a blocks UI, which helps design circuits when you are starting, but unfortunately I believe all his videos are in Spanish, I'd suggest you give it a try even if you don't understand English, as the material available (wiki and videos) is very good. Look for "fpgawars jedi academy " and IceStudio (the tool). But in the end, I personally felt limited by the GUI tool (which was still under heavy development at the time) and went straight to code the verilog code by hand (which obviously is more flexible). Anyway I feel there are not that many pattern to know.
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What's the difference between FPGA, RISC-V, Arduino?
Among your choices, FPGA is the answer. I would suggest a cheap iCE40 board like the iCESugar, to get started. Then follow tutorials targetting ice40+open stack.
- Digital Design for FPGAs, with free tools
cpu11
- Dec F11 precise replica in Verilog, based on reverse engineering of real dies
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I finally got a PDP-8i (sort of).
There are quite a few HDL implementations, eg CPU11 and this list.
What are some alternatives?
icestudio - :snowflake: Visual editor for open FPGA boards
PDP-11 - A collection of PDP-11 related files
apio - :seedling: Open source ecosystem for open FPGA boards
serv - SERV - The SErial RISC-V CPU
uhd - The USRP™ Hardware Driver Repository
hdl - HDL libraries and projects
FPGA_Asynchronous_FIFO - FIFO implementation with different clock domains for read and write.
livehd - Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation
NTHU-ICLAB - 清華大學 | 積體電路設計實驗 (IC LAB) | 110上
riscv - RISC-V CPU Core (RV32IM)
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.