open-fpga-verilog-tutorial
Learn how to design digital systems and synthesize them into an FPGA using only opensource tools (by Obijuan)
FPGA_Asynchronous_FIFO
FIFO implementation with different clock domains for read and write. (by AngeloJacobo)
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| open-fpga-verilog-tutorial | FPGA_Asynchronous_FIFO | |
|---|---|---|
| 3 | 1 | |
| 743 | 10 | |
| - | - | |
| 0.0 | 0.0 | |
| about 4 years ago | over 2 years ago | |
| Verilog | Verilog | |
| GNU General Public License v3.0 only | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
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Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
open-fpga-verilog-tutorial
Posts with mentions or reviews of open-fpga-verilog-tutorial.
We have used some of these posts to build our list of alternatives
and similar projects.
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FPGA for beginners?
The toolchain is called Icestorm, main tool is yosys, most information will be in English. I started with this tutorials here (also in English) https://github.com/Obijuan/open-fpga-verilog-tutorial. Then I used books to learn more on the basics of cpu design in verilog (which can also found online). Obijuan is a Spanish profesor teaching digital electronics in university, he lead the development of a graphical user interface to generate verilog based on a blocks UI, which helps design circuits when you are starting, but unfortunately I believe all his videos are in Spanish, I'd suggest you give it a try even if you don't understand English, as the material available (wiki and videos) is very good. Look for "fpgawars jedi academy " and IceStudio (the tool). But in the end, I personally felt limited by the GUI tool (which was still under heavy development at the time) and went straight to code the verilog code by hand (which obviously is more flexible). Anyway I feel there are not that many pattern to know.
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What's the difference between FPGA, RISC-V, Arduino?
Among your choices, FPGA is the answer. I would suggest a cheap iCE40 board like the iCESugar, to get started. Then follow tutorials targetting ice40+open stack.
- Digital Design for FPGAs, with free tools
FPGA_Asynchronous_FIFO
Posts with mentions or reviews of FPGA_Asynchronous_FIFO.
We have used some of these posts to build our list of alternatives
and similar projects.
What are some alternatives?
When comparing open-fpga-verilog-tutorial and FPGA_Asynchronous_FIFO you can also consider the following projects:
icestudio - :snowflake: Visual editor for open FPGA boards
zipcpu - A small, light weight, RISC CPU soft core
apio - :seedling: Open source ecosystem for open FPGA boards
biriscv - 32-bit Superscalar RISC-V CPU
uhd - The USRP™ Hardware Driver Repository
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
NTHU-ICLAB - 清華大學 | 積體電路設計實驗 (IC LAB) | 110上
psram-tang-nano-9k - An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA
hdl - HDL libraries and projects
cpu11 - Revengineered ancient PDP-11 CPUs, originals and clones
open-fpga-verilog-tutorial vs icestudio
FPGA_Asynchronous_FIFO vs zipcpu
open-fpga-verilog-tutorial vs apio
FPGA_Asynchronous_FIFO vs biriscv
open-fpga-verilog-tutorial vs uhd
FPGA_Asynchronous_FIFO vs darkriscv
open-fpga-verilog-tutorial vs NTHU-ICLAB
open-fpga-verilog-tutorial vs darkriscv
open-fpga-verilog-tutorial vs psram-tang-nano-9k
open-fpga-verilog-tutorial vs hdl
open-fpga-verilog-tutorial vs cpu11
open-fpga-verilog-tutorial vs zipcpu