sphinxcontrib-hdl-diagrams
cocotb-bus
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| sphinxcontrib-hdl-diagrams | cocotb-bus | |
|---|---|---|
| 2 | 1 | |
| 50 | 46 | |
| - | - | |
| 5.7 | 3.7 | |
| 7 months ago | about 2 months ago | |
| Python | Python | |
| Apache License 2.0 | GNU General Public License v3.0 or later |
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sphinxcontrib-hdl-diagrams
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Is there any software I can use to transform state machines in VHDL into drawings?
Well, you can convert VHDL into Verilog using Icarus Verilog, and then you can draw a logic gate diagram (.svg file) to visualize your code using this: https://github.com/SymbiFlow/sphinxcontrib-hdl-diagrams
- Systemverilog / verilog functional editor not like vivado
cocotb-bus
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Cocotb
The cocotb bus repo has many of the useful drivers and monitors. https://github.com/cocotb/cocotb-bus/tree/master/src/cocotb_bus. There is also https://github.com/alexforencich/cocotbext-axi for some relevant AXI examples that you can also just use.
What are some alternatives?
verilator - Verilator open-source SystemVerilog simulator and lint system
cocotbext-axi - AXI interface modules for Cocotb
sane_tikz - Reconquer the canvas: beautiful Tikz figures without clunky Tikz code
cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
fusesoc_template - Example of how to get started with olofk/fusesoc.
hdl_checker - Repurposing existing HDL tools to help writing better code
amaranth - A modern hardware definition language and toolchain based on Python
turbobus - TurboBus is an opinionated implementation of Command Responsibility Segregation pattern in python.
sphinx-tabs - Tabbed views for Sphinx
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
gdscript-docs-maker - Create documentation and class references from your Godot GDScript code
vcdvcd - Python Verilog value change dump (VCD) parser library + the nifty vcdcat VCD command line pretty printer.