edalize
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sphinx-vhdl | edalize | |
---|---|---|
1 | 4 | |
19 | 592 | |
- | - | |
0.0 | 7.2 | |
over 1 year ago | 4 days ago | |
Python | Python | |
BSD 3-clause "New" or "Revised" License | BSD 2-clause "Simplified" License |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
sphinx-vhdl
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sphinx-vhdl: Automatic generation of documentation from VHDL
A student on my team created an extension for Sphinx that allows you to generate documentation directly from comments in VHDL code. Do you know sphinx-vhdl yet? This extension is available as open-source on GitHub, and you can install it from PyPi. https://github.com/CESNET/sphinx-vhdl
edalize
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Dropping EDA-GUI's 101
Check out FuseSoC: https://github.com/olofk/fusesoc which can handle Vivado builds for you (utilizing edalize: https://github.com/olofk/edalize) along with some nice package management. It can run against multiple tools so you can also get it to build simulations using Verilator or a commercial EDA tool if you have access to them.
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Introduction to FPGAs
Check out https://github.com/olofk/fusesoc. It gives you a command line build flow that can drive Vivado (along with many other eda tools via edalize https://github.com/olofk/edalize) without having to touch the GUI (though you might want it for programming the board, though FuseSoC can do that too).
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Compiling Code into Silicon
This reminds me very much of edalize[1], which does something very similar.
[1]: https://github.com/olofk/edalize
- Olof Kindgren on LinkedIn: We have a new world record! 6000 RISC-V cores in a single chip!
What are some alternatives?
MyST-Parser - An extended commonmark compliant parser, with bridges to docutils/sphinx
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
sphinx-revealjs - HTML Presentation builder for Pythonista
skywater-pdk - Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
VHDL-Issues
freepdk-45nm - ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen
sphinx-readme - Generate Beautiful reStructuredText README.rst for GitHub, PyPi, GitLab, BitBucket
apio - :seedling: Open source ecosystem for open FPGA boards
sphinxcontrib-hdl-diagrams - Sphinx Extension which generates various types of diagrams from Verilog code.
icestudio - :snowflake: Visual editor for open FPGA boards
rggen - Code generation tool for control and status registers
opentitan - OpenTitan: Open source silicon root of trust