sdspi VS vgasim

I have built a lot of open-source C++ tooling for design verification. You can find a lot of my C++ models posted on my Github. Example C++ models include: UART, SPI/DSPI/QSPI Flash, SD-Card (SPI-based interface), VGA Video, Ethernet MDIO, PS/2 mouse, OLED display, SDRAM and more. (I've even simulated PLLs using C++ models ...) I have also written extensively about doing so at ZipCPU.com.

You mean ... sort of like I did in this project? I implemented an SPI based controller, where the controller took care of all the bit-banging for you, but the CPU still needed to issue the commands as appropriate for the protocol?

How about an SD card controller? I know I have a SPI based SD card controller, but the SDIO isn't that much harder. If you look hard enough you can find open source SDIO controllers.

There are also open source versions of many of the pieces you will need. I now use an open source crossbar interconnect for most of my designs. I use AutoFPGA to connect all the pieces together. I mentioned my flash controller above, but I also have a SD Card controller I've used quite successfully. I've also posted a UART to Wishbone bridge and discussed network debugging, both of which I use routinely with the ZipCPU. If for no other reason, these components allow me to load or update software on my CPU even after it's been placed into an FPGA. Of course, many of those components are tied to a Wishbone bus infrastructure. You may find you need a bridge of some type to connect different buses structures together--memory naturally tends to operate at one width and clock, video at another, and your CPU at another, so it helps at times to have a universal bus adapter kit handy.

I have built a lot of open-source C++ tooling for design verification. You can find a lot of my C++ models posted on my Github. Example C++ models include: UART, SPI/DSPI/QSPI Flash, SD-Card (SPI-based interface), VGA Video, Ethernet MDIO, PS/2 mouse, OLED display, SDRAM and more. (I've even simulated PLLs using C++ models ...) I have also written extensively about doing so at ZipCPU.com.

Most of the graphical images I've seen won't fit in block RAM on on an FPGA. (Think of an 800x600 pixel image, with 8bits per pixel, and it only gets worse from there.) The image needs to be stored elsewhere. That means, you need ports associated with feeding your image to your Sobel processor. This can happen one of two ways. You can either use a external Video frame buffer reader, or you can drive the memory bus yourself. You haven't said what type of memory bus your system has, so let me instead assume the external reader.

Definitely. To see how this might build up, consider this video sprite module. At each stage, counting from the end, the READY backs up.

Ahm ... I've certainly added C components to my test bench to create and simulate graphical interfaces. Here's one for VGA, and another for HDMI. This isn't really a "nobody does this" task. It's much easier to debug a graphical component graphically than it is to debug it with a wave file. Indeed, I owe my success in one particular video decompression example to being able to stop the simulation in real time in order to find and trace a bug.

Yes--I've done that with both VGA and HDMI. You can find the example here if you want to see how I did it.

Check out this page describing these techniques, or even the repository containing my simulator.

Why not try a Verilator based simulation like this one? You'd then be able to see the (broken) design on a window of your simulation host's screen, and capture a VCD file to see what's going on (or not)? You should be able to just place the VGA outputs into the VGASIM class to be able to see the image on your screen. Multiple video modes are supported, so select the one you need. (The demo works with all modes, but the memory mapped frame buffer's image is only built for 1280x1024, and hence the requirement in the demo).

For an example, you might wish to take a look at the histogram design I posted. Other valuable examples might include the slow filter, the slow linear phase filter, the downsampler, or even the FFT Window function. I've also got a sprite video design that I'd like to write about, but haven't had the chance to test yet. All of these designs need to deal with and work around these issues with internal block RAM.

I have a variety of C++ simulation sources that I use which can create either VGA or HDMI signals to input into a test bench--together with a couple example designs that demonstrate these test benches. They work nicely with Verilator.

This demo shows how the AXI stream framed data can be turned to pixels and sent to a screen--should that be your wish.