nmigen VS xvcd

Compare nmigen vs xvcd and see what are their differences.

nmigen

A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen (by m-labs)

xvcd

Xilinx Virtual Cable Daemon (by tmbinc)
InfluxDB - Power Real-Time Data Analytics at Scale
Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.
www.influxdata.com
featured
SaaSHub - Software Alternatives and Reviews
SaaSHub helps you find the best software and product alternatives
www.saashub.com
featured
nmigen xvcd
3 1
643 100
1.2% -
1.8 0.0
over 2 years ago about 2 years ago
Python C
GNU General Public License v3.0 or later Creative Commons Zero v1.0 Universal
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

nmigen

Posts with mentions or reviews of nmigen. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-06-07.
  • Help a newbie
    1 project | /r/FPGA | 7 Jun 2021
    You can either decide to learn VHDL/Verilog, or use something like nmigen. I recommend learning either Verilog or VHDL anyway, so you can at least read and understand existing designs, but I personally use nmigen.
  • Do these work as JTAG programmers?
    5 projects | /r/FPGA | 7 Jun 2021
    Alternatively, you can just use Vivado to build the bitstream and then use alternative tools like https://github.com/trabucayre/openFPGALoader and http://xc3sprog.sourceforge.net/ to upload the bitstream to your FPGA. This is what I do since I use nmigen myself.
  • How to compare HDL simulation/implementation results to Matlab?
    6 projects | /r/FPGA | 1 Jun 2021

xvcd

Posts with mentions or reviews of xvcd. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-06-07.
  • Do these work as JTAG programmers?
    5 projects | /r/FPGA | 7 Jun 2021
    Yes, any board with the FTDI FT232H works as a JTAG programmer (I actually have the one you linked). You may probably need some jumper wires that have the Xilinx-specific 0.2mm pitch, though, rather than the more convential 0.254mm or 0.1" pitch, if your FPGA board has the actual Xilinx JTAG header. To get it to work inside Vivado, you can use Xilinx Virtual Cable, which is a TCP/IP protocol to act as a JTAG cable (see https://github.com/Xilinx/XilinxVirtualCable and https://github.com/tmbinc/xvcd). The idea is that you basically have a TCP/IP daemon that speaks XVC and relies on libftdi or libusb to communicate with Vivado through XVC and do the actual JTAG programming.

What are some alternatives?

When comparing nmigen and xvcd you can also consider the following projects:

myhdl - The MyHDL development repository

XilinxVirtualCable - Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable.

Pyverilog - Python-based Hardware Design Processing Toolkit for Verilog HDL

XVC-FTDI-JTAG - Xilinx virtual cable server for generic FTDI 4232H.

pyverilator - Python wrapper for verilator model

openFPGALoader - Universal utility for programming FPGA

axi - AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

qemu - Xilinx's fork of Quick EMUlator (QEMU) with improved support and modelling for the Xilinx platforms.

conifer - Collect and revisit web pages.