How to compare HDL simulation/implementation results to Matlab?

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  • pyverilator

    Python wrapper for verilator model

  • I'd use something I could drive from Python, like https://github.com/csail-csg/pyverilator and verilator since it is fast. I'd containerize the tests and use [py.test]https://docs.pytest.org/en/6.2.x/) to run specific unit or integration tests. Ideally everything would be parameterized.

  • nmigen

    A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

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  • Pyverilog

    Python-based Hardware Design Processing Toolkit for Verilog HDL

  • PyVerilog https://github.com/PyHDI/Pyverilog

  • myhdl

    The MyHDL development repository

  • MyHDL http://www.myhdl.org/

  • qemu

    Xilinx's fork of Quick EMUlator (QEMU) with improved support and modelling for the Xilinx platforms. (by Xilinx)

  • I'd probably simulate both the accelerator and the AXI wrapper. One could instantiate a risc-v core to drive the AXI bus under simulation. gem5 or qemu see the Xilinx fork with AXI support.

  • axi

    AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

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