Pyverilog Alternatives

Similar projects and alternatives to Pyverilog

• pyverilator

  1 64 0.0 Python Pyverilog VS pyverilator

  Python wrapper for verilator model

  

• myhdl

  2 964 0.0 Python Pyverilog VS myhdl

  The MyHDL development repository

  

• Onboard AI

  getonboard.dev

  sponsored

  Learn any GitHub repo in 59 seconds. Onboard AI learns any GitHub repo in minutes and lets you chat with it to locate functionality, understand different parts, and generate new code. Use it for free at www.getonboard.dev.

  

• PyRTL

  1 216 0.0 Python Pyverilog VS PyRTL

  A collection of classes providing simple hardware specification, simulation, tracing, and testing suitable for teaching and research. Simplicity, usability, clarity, and extendability rather than performance or optimization is the overarching goal.

  

• datamodel-code-generator

  - 1,955 0.0 Python Pyverilog VS datamodel-code-generator

  Pydantic model and dataclasses.dataclass generator for easy conversion of JSON, OpenAPI, JSON Schema, and YAML data sources.

• nmigen

  1 633 1.8 Python Pyverilog VS nmigen

  A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen

  

• pymtl3

  1 325 0.0 Python Pyverilog VS pymtl3

  Pymtl 3 (Mamba), an open-source Python-based hardware generation, simulation, and verification framework

  

• nngen

  - 291 0.0 Python Pyverilog VS nngen

  NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network

  

• InfluxDB

  www.influxdata.com

  sponsored

  Collect and Analyze Billions of Data Points in Real Time. Manage all types of time series data in a single, purpose-built database. Run at any scale in any environment in the cloud, on-premises, or at the edge.

  

• pylog

  1 51 0.0 Python Pyverilog VS pylog

  PyLog: An Algorithm-Centric FPGA Programming and Synthesis Flow

• qemu

  1 208 7.8 C Pyverilog VS qemu

  Xilinx's fork of Quick EMUlator (QEMU) with improved support and modelling for the Xilinx platforms. (by Xilinx)

  

• axi

  1 817 0.0 SystemVerilog Pyverilog VS axi

  AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

  

• PyChip-py-hcl

  1 35 10.0 Python Pyverilog VS PyChip-py-hcl

  A Hardware Construct Language