litex
Build your hardware, easily! (by enjoy-digital)
prjxray
Documenting the Xilinx 7-series bit-stream format. (by f4pga)
| litex | prjxray | |
|---|---|---|
| 29 | 8 | |
| 2,688 | 736 | |
| - | 0.7% | |
| 9.7 | 8.4 | |
| 7 days ago | 9 days ago | |
| C | Python | |
| GNU General Public License v3.0 or later | ISC License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
litex
Posts with mentions or reviews of litex.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-11-06.
-
FPGA Dev Boards for $150 or Less
https://github.com/enjoy-digital/litex
they have tutorials, you can get compatible boards for around $20
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
With LiteX you can synthesize a VexRiscV processor. You can run Linux on it. The toolchain is pretty easy to use, as long as you use Xilinx Vivado to compile to gateware.
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Sunset TCL scripts ?
LiteX is a great example of a Python-first flow. However, they have chosen not to subordinate the scripting environment to a GUI toolchain - EDA vendors are unlikely to choose the same trade.
- synthesizing and using the Ibex RISC-V core
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Been messing around with litex and migen on my Tang Primer 20K
To lean these: https://github.com/enjoy-digital/litex, https://github.com/m-labs/migen
- CPU design for college project
- How can I learn about RISC-V and use case? I want to do a project for begginers
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How Much Would It Cost For A Truly Open Source RISC-V SOC?
If you use LiteX to generate a VexRiscV system-on-a-chip, you can include an open source DDR DRAM PHY. This works on Xilinx Spartan-6, Spartan7Artix7/Kintex7/Virtex7 FPGAs, and Lattice ECP5 FPGAs. DDR/LPDDR/DDR2/DDR3 depending on the FPGA.
- LiteX: Build Hardware Easily
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Using FPGAs for computations as a beginner
I am interested in trying out FPGAs for the purpose of running specific calculations more efficiently. Since the calculations themselves are quite complex, I would need to be able to program in a relatively high-level language. I've seen that designing SoC in Python is possible, for example with Litex (https://github.com/enjoy-digital/litex) or Amaranth (https://github.com/amaranth-lang/). I don't want to spend hundreds of hours learning about FPGAs, but I'm prepared to take on a challenge.
prjxray
Posts with mentions or reviews of prjxray.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2024-01-04.
- AMD Proposes an FPGA Subsystem User-Space Interface for Linux
- OpenPOWER Foundation Demoes the LibreBMC Power-Based Open-Source BMC
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Using FPGAs for CyberSecurity/Cryptography.
There are many applications to FPGA security. You could use Project X-Ray to reverse engineer and edit a bitstream. You could learn how to use encrypted bitstreams to prevent someone from reverse engineering and editing your own bitstream. You could perform a side channel attack on an FPGA.
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NiteFury – An Artix-7 FPGA with its own DDR3 RAM right in your laptop (2019)
A bit of a nitpick - LiteX still needs Vivado installed for now for 7 series FPGAs. There's a project that's very far along in reverse engineering the Xilinx bitstream (https://github.com/f4pga/prjxray), but it's still missing many features (PCIe, SERDES, etc.).
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Partial reconfiguration safety problems
this information is not difficult to extract. maybe make a donation to https://github.com/f4pga/prjxray or appeal to their vanity. they can probably write such a script in an hour or two.
- Symbiflow: The GCC of the FPGA World
-
The J1 Forth CPU
Here is a project to reverse engineer the Xilinx series 7 FPGAs to be able to target them with open source tools:
https://github.com/SymbiFlow/prjxray
What are some alternatives?
When comparing litex and prjxray you can also consider the following projects:
nmigen-tutorial - A tutorial for using nmigen
openFPGALoader - Universal utility for programming FPGA
SpinalHDL - Scala based HDL
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
FPGA-Ping-Pong-game - Simple Ping Pong game on Xilinx Spartan 3E
SaxonSoc - SoC based on VexRiscv and ICE40 UP5K
f4pga - FOSS Flow For FPGA
openwifi - open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
sphinxcontrib-hdl-diagrams - Sphinx Extension which generates various types of diagrams from Verilog code.
verilog-ethernet - Verilog Ethernet components for FPGA implementation
f4pga-arch-defs - FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.