Cores-VeeR-EL2
projf-explore
| Cores-VeeR-EL2 | projf-explore | |
|---|---|---|
| 1 | 3 | |
| 222 | 526 | |
| 0.9% | 5.7% | |
| 9.0 | 4.5 | |
| 5 days ago | 6 days ago | |
| SystemVerilog | SystemVerilog | |
| Apache License 2.0 | MIT License |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Cores-VeeR-EL2
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Anandtech: "IBM Power10 Coming To Market: E1080 for 'Frictionless Hybrid Cloud Experiences'"
Including Western Digital's cores used in their SSD controllers: https://github.com/chipsalliance/Cores-SweRV https://github.com/chipsalliance/Cores-SweRV-EL2
projf-explore
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Exploring FPGA Graphics
* https://github.com/projf/projf-explore/blob/main/graphics/fp...
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FPGA Advent Calendar
Twitter thread author here.
If this inspires you to learn more about FPGAs, check out:
1. Recommended FPGA Sites: https://projectf.io/recommended-fpga-sites/
2. Project F: https://projectf.io/sitemap/
3. Project F GitHub: https://github.com/projf/projf-explore
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Drawing with an FPGA
If you're interested in FPGA graphics, take a look at the latest version of the Project F Verilog library: https://github.com/projf/projf-explore/tree/master/lib/graphics.
What are some alternatives?
riscv-boom - SonicBOOM: The Berkeley Out-of-Order Machine
fpga_craft - A voxel game/Minecraft clone for the iCE40 UP5K FPGA
Cores-VeeR-EH1 - VeeR EH1 core
eurorack-pmod - Hardware and gateware for getting started in FPGA-based audio synthesis with open source tools.
cv32e40p - CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
FPGA-Video-Processing - Realtime video processing w/ Gaussian + Sobel Filters targeting Artix-7 FPGA
rocket-chip - Rocket Chip Generator
cva6 - The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
VeriGPU - OpenSource GPU, in Verilog, loosely based on RISC-V ISA
ndk-app-minimal - Minimal Application based on Network Development Kit (NDK) for FPGA cards
scr1 - SCR1 is a high-quality open-source RISC-V MCU core in Verilog
axi - AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication