Hey Xilinx users, let me have it...

• wb2axip

  51 433 3.1 Verilog

  Bus bridges and other odds and ends

Yeah, I get it. In this case, I wanted to encourage adoption of my AutoFPGA software, and since AutoFPGA depended heavily on the bus designs in the wb2axip repo I had to make those more permissive than GPL. That makes the wb2axip repo kind of an outlier, but it is there for that reason.

• autofpga

  9 156 4.3 C++

  A utility for Composing FPGA designs from Peripherals

Now, whether or not AutoFPGA fits the bill for anyone--that's an entirely different question. I suspect the answer is, "No", but that's really a different conversation for a different time/thread. One of the things it can do is compose an AXI bus from multiple master and slave configurations--all using user controlled and very version controllable configuration files. The big problem it has (currently) is the lack of a strong verification suite. That's probably going to hit the top of my to-do list soon enough.

• InfluxDB

  www.influxdata.com featured

  Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

  

• verilog-axi

  9 1,257 3.0 Verilog

  Verilog AXI components for FPGA implementation

You can also look at some of my code, which is all MIT licensed: https://github.com/alexforencich/verilog-axi

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