uart-for-fpga VS spi-fpga

Compare uart-for-fpga vs spi-fpga and see what are their differences.

uart-for-fpga

Simple UART controller for FPGA written in VHDL (by jakubcabal)
Uart Fpga uart-controller Vhdl Controller wishbone wishbone-bus uart-loopback Simulation ghdl cyc1000
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spi-fpga

SPI master and SPI slave for FPGA written in VHDL (by jakubcabal)
spi-slave spi-master Fpga Vhdl Spi Controller spi-loopback spi-controller cyc1000 accelerometer ghdl
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uart-for-fpga spi-fpga
1 2
89 157
- -
0.0 0.0
almost 3 years ago about 3 years ago
VHDL VHDL
MIT License MIT License
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uart-for-fpga

Posts with mentions or reviews of uart-for-fpga. We have used some of these posts to build our list of alternatives and similar projects.
  • Entity bound SDC in Quartus
    1 project | /r/FPGA | 23 Apr 2022
    The code in the link below contains an example of my use of the altera_attribute: https://github.com/jakubcabal/uart-for-fpga/blob/master/examples/common/rst_sync.vhd

spi-fpga

Posts with mentions or reviews of spi-fpga. We have used some of these posts to build our list of alternatives and similar projects.

What are some alternatives?

When comparing uart-for-fpga and spi-fpga you can also consider the following projects:

fpu - IEEE 754 floating point library in system-verilog and vhdl

vunit - VUnit is a unit testing framework for VHDL/SystemVerilog

sdram-fpga - A FPGA core for a simple SDRAM controller.

catapult-v3-smartnic-re - Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)

cyc1000-rsu - The CYC1000 FPGA Remote System Upgrade project

upduino-projects - Various VHDL projects I've worked on for the Upduino v2.0 and v3.0

neoTRNG - 🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).

w11 - PDP-11/70 CPU core and SoC

wb_spi_bridge - 🌉 A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).

fpga_puf - :key: Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.

AXI4 - AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

spi-to-axi-bridge - An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.

uart-for-fpga vs fpu spi-fpga vs vunit uart-for-fpga vs sdram-fpga spi-fpga vs catapult-v3-smartnic-re uart-for-fpga vs cyc1000-rsu spi-fpga vs upduino-projects spi-fpga vs neoTRNG spi-fpga vs w11 spi-fpga vs wb_spi_bridge spi-fpga vs fpga_puf spi-fpga vs AXI4 spi-fpga vs spi-to-axi-bridge