fpu
neorv32-riscof
| fpu | neorv32-riscof | |
|---|---|---|
| 1 | 2 | |
| 46 | 25 | |
| - | - | |
| 6.1 | 9.1 | |
| 2 months ago | 9 days ago | |
| VHDL | Python | |
| Apache License 2.0 | BSD 3-clause "New" or "Revised" License |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
fpu
-
High level floating point arithmetic in vhdl
Another really nice one that I found recently, uses a fused multiply add unit rather than seperate multiplier and adder. It's available in both mixed precision (double/single) and single precision flavours.
neorv32-riscof
What are some alternatives?
neorv32-setups - 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
neoTRNG - 🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
fpu-sp - IEEE 754 floating point library in system-verilog and vhdl
fpga_puf - :key: Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
uart-for-fpga - Simple UART controller for FPGA written in VHDL
riscv-debug-dtm - 🐛 JTAG debug transport module (DTM) - compatible to the RISC-V debug specification.
or1200 - OpenRISC 1200 implementation
spi-fpga - SPI master and SPI slave for FPGA written in VHDL
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Hastlayer-SDK - Turning .NET software into FPGA hardware for faster execution and lower power usage.
potato - A simple RISC-V processor for use in FPGA designs.