f4pga
sphinxcontrib-hdl-diagrams
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| f4pga | sphinxcontrib-hdl-diagrams | |
|---|---|---|
| 6 | 2 | |
| 314 | 49 | |
| 5.4% | - | |
| 1.9 | 5.7 | |
| 3 days ago | 7 months ago | |
| Python | Python | |
| Apache License 2.0 | Apache License 2.0 |
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f4pga
- Show HN: Atopile – Design circuit boards with code
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AMD Proposes an FPGA Subsystem User-Space Interface for Linux
I hope AMD sees the light and helps F4FPGA develop a more complete open source toolchain for their FGPAs (https://f4pga.org). With this subsystem and an open source compilation flow, FGPA experiments would be way easier.
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
I tried to get LiteX to work with F4PGA, an open source FPGA toolchain, instead of the Xilinx tools, but it was a huge hassle. Just use LiteX with the Xilinx tools.
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Running Linux on Xilinx / AMD FPGA Softcore Example Design
Not really, at least not apples-apples for something like a Pi.
There are a couple of different aspects to this, one is that soft-logic it typically slower than hard-logic so you just can't get comparable frequencies out of a soft implementation. For datapath designs, this is typically solved by going wider, but that isn't quite as helpful or practical for all aspects of a processor implemented in soft logic.
If you look at the specs for this softcore processor, they have much less performance than a Pi, even when you're using some of the biggest and more $$ families of FPGAs: https://www.xilinx.com/products/design-tools/microblaze.html....
I'd say that is on-part with similar complexity soft-core CPUs from other vendors or even open-source ones.
With respect to the design transparency, it kind of depends on how much you care about the black-box compilers required to use a lot of these advanced chips. You can feed open-source RTL into them, but there's still a proprietary black-box compiler/fitter/place-route etc for a lot of these.
There's some work toward open toolchains from yosys and https://f4pga.org/, but none of the big FPGA companies seem very bought-in or willing to help a, so it's been a community best-effort, and for some of the fancier devices, you still have to use the proprietary tools to build bitstreams.
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Newbie's complaints about Xilinx software
I am a believer that the open source days will come: https://f4pga.org/
- Symbiflow: The GCC of the FPGA World
sphinxcontrib-hdl-diagrams
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Is there any software I can use to transform state machines in VHDL into drawings?
Well, you can convert VHDL into Verilog using Icarus Verilog, and then you can draw a logic gate diagram (.svg file) to visualize your code using this: https://github.com/SymbiFlow/sphinxcontrib-hdl-diagrams
- Systemverilog / verilog functional editor not like vivado
What are some alternatives?
icestorm - Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
verilator - Verilator open-source SystemVerilog simulator and lint system
f4pga-examples - Example designs showing different ways to use F4PGA toolchains.
sane_tikz - Reconquer the canvas: beautiful Tikz figures without clunky Tikz code
f4pga-arch-defs - FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
cocotb-bus - Pre-packaged testbenching tools and reusable bus interfaces for cocotb
docs - Documentation site
fusesoc_template - Example of how to get started with olofk/fusesoc.
prjtrellis - Documenting the Lattice ECP5 bit-stream format.
amaranth - A modern hardware definition language and toolchain based on Python
atopile - Design circuit boards with code! ✨ Get software-like design reuse 🚀, validation, version control and collaboration in hardware; starting with electronics ⚡️
sphinx-tabs - Tabbed views for Sphinx