PipelineC
clash-ghc
| PipelineC | clash-ghc | |
|---|---|---|
| 46 | 33 | |
| 548 | 1,381 | |
| - | 1.6% | |
| 9.5 | 9.1 | |
| 12 days ago | 1 day ago | |
| Python | Haskell | |
| GNU General Public License v3.0 only | BSD 2-clause "Simplified" License |
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PipelineC
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PipelineC Example: FM Radio Demodulation (FPGA SDR)
Related: PipelineC: A C-like hardware description language (HDL):
https://github.com/JulianKemmerer/PipelineC
- Generate non-CPU FPGA circuits from a C-like language
- What makes C, Verilog, Java, Python, etc. so different?
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What are your private FPGA projects and why?
https://github.com/JulianKemmerer/PipelineC :)
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What's the right path to learning for someone coming from software?
However, I think its still possible to have a productive C->HDL journey. Check out PipelineC, https://github.com/JulianKemmerer/PipelineC, its meant for folks with C experience to get right into doing RTL style reasoning :)
- Seeking Advice on How to approch RTL Programming
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Using FPGAs for computations as a beginner
https://github.com/JulianKemmerer/PipelineC-Graphics/blob/main/doc/Sphery-vs-Shapes.pdf https://github.com/JulianKemmerer/PipelineC
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Generating pipeline stages automatically?
This is exactly what the PipelineC tool was made for. https://github.com/JulianKemmerer/PipelineC
- Does Xilinx use multiplication algorithms to speed up/reduce the multipliers size?
- Sphery vs. Shapes, the first raytraced game that is not software
clash-ghc
- Clash: A Functional Hardware Description Language
- Clash (Haskell) for ASIC design
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Building a Networked Key-Value-Store on an FPGA
> You'd be better off with a higher-level or more modern HDL that compiles to Verilog/VHDL. "Chisel" is one such.
As is Clash :) https://clash-lang.org/
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Need project idea
You can take a look at https://clash-lang.org/. There is also a book for it. https://gergo.erdi.hu/retroclash/
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5 layered CNN implementation on arduino/FPGAs [P]
I don't know much about FPGAs, but Clash lang compiles to VHDL, and might do the trick: https://clash-lang.org
- An addressable little explored language gap: HDL - Hardware Description Languages, any language used for electronic circuit design, description, and specs
- Pedagogical Downsides of Haskell
- Ask HN: Choice of HDL for an FPGA Project
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Baud rate 1.5% lower than expected, is this normal?
if you need inspiration there is a full UART core available in clash: https://github.com/clash-lang/clash-compiler/blob/master/clash-cores/src/Clash/Cores/UART.hs
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A circuit simulator that doesn't look like it was made in 2003
Perhaps peripheral (the original site has been hugged to death).
Both clashlang: https://clash-lang.org/
And Hardcaml: https://github.com/janestreet/hardcaml
have personally fueled my interest in hardware.
Dan Luu speaks eloquently and at length about how better options are needed for logic design. I would recommend both of the above to the enthusiastic novice.
What are some alternatives?
pygears - HW Design: A Functional Approach
wiringPi - A Haskell binding to the wiringPi library, for using GPIO on the Raspberry Pi.
cocotb - cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
clash-prelude
pycparser - :snake: Complete C99 parser in pure Python
mercury-api - Haskell binding to Mercury API for ThingMagic RFID readers
nngen - NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network
ICFP2020_Bluespec_Tutorial - Tutorial on hardware design using Bluespec BH (Bluespec Classic) for Haskell programmers at ACM ICFP 2020 conference
hls4ml - Machine learning on FPGAs using HLS
riscv-cores-list - RISC-V Cores, SoC platforms and SoCs
antikernel - The Antikernel operating system project
amaranth - A modern hardware definition language and toolchain based on Python