Haskell Systemverilog

Open-source Haskell projects categorized as Systemverilog
Edit details
Topics: Verilog Hardware Haskell Asic Fpga
Power Real-Time Data Analytics at Scale
Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.
www.influxdata.com
Sponsored

Haskell Systemverilog Projects

  • clash-ghc

    Haskell to VHDL/Verilog/SystemVerilog compiler

    Project mention: Clash: A Functional Hardware Description Language | news.ycombinator.com | 2023-12-27

  • sv2v

    SystemVerilog to Verilog conversion

    Project mention: Verilog functions and wires | /r/Verilog | 2023-06-11

    I see what you mean by some online examples adding begin...end in functions. They are not actually required, and many people choose to leave it out (sv2v, lowRISC, BSG). I don't believe there is a benefit to adding them, and it just creates more opportunities for bugs that compilers/linters cannot check.

  • WorkOS

    The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020). The latest post mention was on 2023-12-27.

Haskell Systemverilog related posts

Index

Project Stars
1 clash-ghc 1,370
2 sv2v 462

Sponsored
SaaSHub - Software Alternatives and Reviews
SaaSHub helps you find the best software and product alternatives
www.saashub.com