Why is simulation such an important step in the design workflow? Why not just run on actual hardware?

This page summarizes the projects mentioned and recommended in the original post on /r/FPGA
Fpga soft-core cross-compiler Verilog Verilator

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  • zipcpu

    A small, light weight, RISC CPU soft core

    • My experience comes from both the ZipCPU (a basic pipelined CPU) and verifying a lot of bus components. I haven't (yet) done an out of order processor, although I will say that verifying a cache gets really basic with formal methods, and I've now verified several cache implementations. The first data cache I wrote took me about two weeks to both write and complete a full formal proof.

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