zbasic VS qspiflash

Here's sort of a generic repo you can look at which might give you some ideas.

Let me also point out that I rarely use Verilators -exe flag. I tend instead to build my designs in steps: 1) Run Verilator, 2) run make -f Vtoplvl.mk in the obj_dir directory, 3) turn my test script into an object file, and only then 4) link everything together into an executable. I've also been known for peeking at Verilator's internal variables during a simulation run--but that may be another topic entirely.

As examples: - Here's how I process libelf to provide me with an array of section pointers, each containing the address to load the values at - Here's where I then load the values into my design when I'm using an external loader via a debugging bus. - Here's another copy of the same, this time running from within Verilator rather than from within externally controlled logic.

The components found in ZBasic will split the stream into two. The key files you'll want there are dbluartsim.cpp and (again) netuart.cpp. To use dbluart, you'll need three pieces: First, you'll need to call setup() to set the baud rate, then once per clock cycle you'll want to call the operator() method--which is really just a rename for the tick() method.

I have built a lot of open-source C++ tooling for design verification. You can find a lot of my C++ models posted on my Github. Example C++ models include: UART, SPI/DSPI/QSPI Flash, SD-Card (SPI-based interface), VGA Video, Ethernet MDIO, PS/2 mouse, OLED display, SDRAM and more. (I've even simulated PLLs using C++ models ...) I have also written extensively about doing so at ZipCPU.com.

I have published, on GitHub, a C++ SPI (and Dual SPI, Quad SPI, etc.) model that I use extensively with Verilator. It's held nicely against all of the flash devices I've had to work with when using Xilinx chips, with a bit of an exception for Micron's delay between the Quad SPI address and any returned data. I also wrote an article about how to design, and then formally verify an SPI flash controller. Feel free to check them out and see if they'll work for you.

Since I don't use the Xilinx IP, I've found myself doing this often on any board bringup. You can find my flash IP here, and the software I use to get the flash ID here.

Here's the flash controller repo I use. There's a flash controller in there for SPI, Dual SPI, and Quad SPI. The Dual and Quad SPI controllers need a device specific startup script to get them into the right mode. This script should be fairly well explained by the comments. You should find at least one of these controllers that works for you. More recent versions of the controller have a Wishbone arbiter within them -- they're just not checked in the repo yet. (DSPI, QSPI). This makes it so the design fully supports two two Wishbone ports: a config port by which you can send any value and the memory mapped read port. (You can't use both at the same time.)