sdram-fpga
A FPGA core for a simple SDRAM controller. (by nullobject)
uart-for-fpga
Simple UART controller for FPGA written in VHDL (by jakubcabal)
sdram-fpga | uart-for-fpga | |
---|---|---|
2 | 1 | |
105 | 84 | |
- | - | |
10.0 | 0.0 | |
over 2 years ago | over 2 years ago | |
VHDL | VHDL | |
MIT License | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
sdram-fpga
Posts with mentions or reviews of sdram-fpga.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Seeking Help with SDRAM Controller Debugging
Initially, I attempted to adapt an SDRAM [controller project I found on GitHub]( https://github.com/nullobject/sdram-fpga/blob/master/sdram.vhd) to my board by configuring the necessary parameters such as timing constants and memory dimensions.
-
SDRAM clock vs controller clock vs system clock
here you go
uart-for-fpga
Posts with mentions or reviews of uart-for-fpga.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Entity bound SDC in Quartus
The code in the link below contains an example of my use of the altera_attribute: https://github.com/jakubcabal/uart-for-fpga/blob/master/examples/common/rst_sync.vhd
What are some alternatives?
When comparing sdram-fpga and uart-for-fpga you can also consider the following projects:
forth-cpu - A Forth CPU and System on a Chip, based on the J1, written in VHDL
fpu - IEEE 754 floating point library in system-verilog and vhdl
spi-fpga - SPI master and SPI slave for FPGA written in VHDL
cyc1000-rsu - The CYC1000 FPGA Remote System Upgrade project
vunit - VUnit is a unit testing framework for VHDL/SystemVerilog
Hastlayer-SDK - Turning .NET software into FPGA hardware for faster execution and lower power usage.
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
wb_spi_bridge - 🌉 A transparent Wishbone-to-SPI bridge supporting Execute-In-Place (XIP).