sdram-fpga
A FPGA core for a simple SDRAM controller. (by nullobject)
spi-fpga
SPI master and SPI slave for FPGA written in VHDL (by jakubcabal)
| sdram-fpga | spi-fpga | |
|---|---|---|
| 2 | 2 | |
| 105 | 157 | |
| - | - | |
| 10.0 | 0.0 | |
| over 2 years ago | about 3 years ago | |
| VHDL | VHDL | |
| MIT License | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
sdram-fpga
Posts with mentions or reviews of sdram-fpga.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Seeking Help with SDRAM Controller Debugging
Initially, I attempted to adapt an SDRAM [controller project I found on GitHub]( https://github.com/nullobject/sdram-fpga/blob/master/sdram.vhd) to my board by configuring the necessary parameters such as timing constants and memory dimensions.
-
SDRAM clock vs controller clock vs system clock
here you go
spi-fpga
Posts with mentions or reviews of spi-fpga.
We have used some of these posts to build our list of alternatives
and similar projects.
-
The accelerometer on the CYC1000 FPGA board.
Last year I did experiments with the accelerometer on the CYC1000 FPGA board. The result is the Spirit Level example for my Git repository with SPI controllers. I also started using GHDL in GitHub Actions to automate my simulations. It is an easy-to-use CI for VHDL projects. https://github.com/jakubcabal/spi-fpga
- Does anyone have a Slave Quad SPI in VHDL?
What are some alternatives?
When comparing sdram-fpga and spi-fpga you can also consider the following projects:
forth-cpu - A Forth CPU and System on a Chip, based on the J1, written in VHDL
vunit - VUnit is a unit testing framework for VHDL/SystemVerilog