rv16poc
fpu-sp
Our great sponsors
| rv16poc | fpu-sp | |
|---|---|---|
| 1 | 3 | |
| 15 | 20 | |
| - | - | |
| 4.1 | 6.9 | |
| 11 months ago | about 2 months ago | |
| VHDL | VHDL | |
| Apache License 2.0 | Apache License 2.0 |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
rv16poc
fpu-sp
-
Intel discontinues Nios II IP
My team has a solution in place already, which was to write all of our floating point code to call macros rather than putting arithmetic in the code. This allowed us to port easily to an RV32IM CPU (a fork of this one) then memory map an FPU onto it, the macros were then changed to atomically access the FPU registers for any floating point arithmetic. In Intel chips we are using the Nios II floating point hardware 2 (which can be instantiated separately), in other vendors we use a combination of operators from the Opencores FPU and this one, depending upon what operators are selected via generics, the maths library will pick up what configuration is used and choose the available operators.
-
High level floating point arithmetic in vhdl
Another really nice one that I found recently, uses a fused multiply add unit rather than seperate multiplier and adder. It's available in both mixed precision (double/single) and single precision flavours.
-
Got any good reads on floating point math design?
I recently saw an interesting idea in this VHDL repository which combines addition and multiplication in a single fused multiply add unit. Division and square root are combined as well. In my opinion the FMADD block needs some more pipeline stages.
What are some alternatives?
neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
cvfpu - Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.
fpu - IEEE 754 floating point library in system-verilog and vhdl
mrisc32-a1 - A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA
or1200 - OpenRISC 1200 implementation
Hastlayer-SDK - Turning .NET software into FPGA hardware for faster execution and lower power usage.
VHDL-Guide - VHDL Guide
hlsVHDL_floating_point
edalize - An abstraction library for interfacing EDA tools
bonfire-cpu - FPGA optimized RISC-V (RV32IM) implemenation
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation