riscv-simple-sv VS FPGA-Video-Processing

Compare riscv-simple-sv vs FPGA-Video-Processing and see what are their differences.

riscv-simple-sv

A simple RISC V core for teaching (by tilk)
risc-v Riscv Verilog
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FPGA-Video-Processing

Realtime video processing w/ Gaussian + Sobel Filters targeting Artix-7 FPGA (by georgeyhere)
Verilog Computer Vision Fpga
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riscv-simple-sv FPGA-Video-Processing
2 1
145 20
- -
0.0 0.0
over 2 years ago over 2 years ago
SystemVerilog SystemVerilog
BSD 3-clause "New" or "Revised" License -
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riscv-simple-sv

Posts with mentions or reviews of riscv-simple-sv. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-04-10.
  • Simple CPU cores to study?
    3 projects | /r/Verilog | 10 Apr 2021
    I published the code on GitHub: https://github.com/tilk/riscv-simple-sv
  • Need help in CPU design
    5 projects | /r/FPGA | 22 Mar 2021
    I need to run a RISC-V softcore in my FPGA. I don't need to develop the core myself, which means I can use one with good support and that is well implemented (if someone knows a good one, tell me in the comments, please). Since I'm a little new to this area I started by using a simple core: https://github.com/tilk/riscv-simple-sv, however, I'm a little lost in the steps that I need to do. First, I need to put the core in my FPGA. Then, how can I execute code in the core? Do I need to put the machine code into the ROM? And how can I do that? What if I want to debug my C programs that are supposed to run on the core?

FPGA-Video-Processing

Posts with mentions or reviews of FPGA-Video-Processing. We have used some of these posts to build our list of alternatives and similar projects.

What are some alternatives?

When comparing riscv-simple-sv and FPGA-Video-Processing you can also consider the following projects:

cv32e40p - CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

scr1 - SCR1 is a high-quality open-source RISC-V MCU core in Verilog

projf-explore - Project F brings FPGAs to life with exciting open-source designs you can build on.

gdb-stub - gdb-proxy implementation for bonfire

KinnowCPU - CPU implementing the Limn2600 architecture.

picoMIPS - picoMIPS processor doing affine transformation

deepsocflow - An Open Workflow to Build Custom SoCs and run Deep Models at the Edge

neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

libsv - An open source, parameterized SystemVerilog digital hardware IP library

VeriGPU - OpenSource GPU, in Verilog, loosely based on RISC-V ISA

ulm-on-ice - ULM (Ulm Lecture Machine) on ice40

riscv-simple-sv vs cv32e40p FPGA-Video-Processing vs scr1 riscv-simple-sv vs scr1 FPGA-Video-Processing vs projf-explore riscv-simple-sv vs gdb-stub FPGA-Video-Processing vs KinnowCPU riscv-simple-sv vs picoMIPS FPGA-Video-Processing vs deepsocflow riscv-simple-sv vs neorv32 FPGA-Video-Processing vs libsv riscv-simple-sv vs VeriGPU FPGA-Video-Processing vs ulm-on-ice