neorv32-riscof
✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility. (by stnolting)
fpu
IEEE 754 floating point library in system-verilog and vhdl (by taneroksuz)
| neorv32-riscof | fpu | |
|---|---|---|
| 2 | 1 | |
| 24 | 47 | |
| - | - | |
| 9.1 | 6.2 | |
| 7 days ago | 5 days ago | |
| Python | VHDL | |
| BSD 3-clause "New" or "Revised" License | Apache License 2.0 |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
neorv32-riscof
Posts with mentions or reviews of neorv32-riscof.
We have used some of these posts to build our list of alternatives
and similar projects.
fpu
Posts with mentions or reviews of fpu.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-08-08.
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High level floating point arithmetic in vhdl
Another really nice one that I found recently, uses a fused multiply add unit rather than seperate multiplier and adder. It's available in both mixed precision (double/single) and single precision flavours.
What are some alternatives?
When comparing neorv32-riscof and fpu you can also consider the following projects:
neoTRNG - 🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
neorv32-setups - 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
fpga_puf - :key: Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
fpu-sp - IEEE 754 floating point library in system-verilog and vhdl
riscv-debug-dtm - 🐛 JTAG debug transport module (DTM) - compatible to the RISC-V debug specification.
uart-for-fpga - Simple UART controller for FPGA written in VHDL