minimax
ch32v003
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minimax | ch32v003 | |
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13 | 4 | |
194 | 299 | |
- | - | |
2.9 | 4.9 | |
8 days ago | about 1 month ago | |
Verilog | C | |
BSD 3-clause "New" or "Revised" License | Apache License 2.0 |
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minimax
- Is the 6502 a RISC or CISC processor? (2005)
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A Single-Cycle 64-Bit RISC-V Register File
On FPGAs, a register file probably fits better into distributed RAM than block RAM.
On Xilinx, for example: a 64-bit register file doesn't map efficiently to Xilinx's RAMB36 primitives. You'd need 2 RAMB36 primitives to provide a 64-bit wide memory with 1 write port and 2 read ports, each addressed separately. Only 6% (32 of 512) entries in each RAMB36 are ever addressable. It's this inefficient because ports, not memory cells, are the contented resource and BRAMs geometries aren't that elastic.
A 64-bit register file in distributed RAM, conversely, is a something like an array of DPRAM32 primitives (see, for example, UG474). Each register would still be stored multiple times to provide additional ports, but depending on the fabric, there's less (or no) unaddressed storage cells.
The Minimax RISC-V CPU (https://github.com/gsmecher/minimax; advertisement warning: my project) is what you get if you chase efficient mapping of FPGA memory primitives (both register-file and RAM) to a logical conclusion. Whether this is actually worth hyper-optimizing really depends on the application. Usually, it's not.
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Verilator - Do I need to maintain two testbench suits?
I haven't used it on a huge design (I'm usually a VHDL person), but it was a hassle-free replacement for iverilog when regression testing Minimax. Performance is substantially better; compilation times are worse.
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Zylin ZPU: The worlds smallest 32 bit CPU with GCC toolchain
Note that you can't compare LUT4 results (ZPU @ 440 LUTs) against LUT6 results (PicoRV32 @ 750 LUTs). The ZPU is remarkably small, and it's a bigger gap than a direct comparison shows.
SERV is a fair comparison, since it's architected for 4LUTs and I suspect the synthesis results come from iCE40 tools.
I have a contender in the "very small" space, too [1], although I don't claim it's as mature or complete as SERV. (If Minimax was excluded from your post on the basis of insanity, I'm OK with that.)
[1] https://github.com/gsmecher/minimax
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Senior Design Project Ideas?
I develop Minimax (https://github.com/gsmecher/minimax), an open-source RISC-V implementation. It's currently written in both VHDL and Verilog (the two implementations are equivalent, though I am likely to drop the VHDL implementation if it's too much work to keep them both.)
- Compiled and Interpreted Languages: Two Ways of Saying Tomato
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PicoBlaze in Verilog / Vivado
The best point-of-entry for "tiny" MCUs these days is FemtoRV32-Quark or SERV. I also maintain my own small RISC-V core (Minimax), though it's early on in graduating from "experiment" to "real design".
- Show HN: Minimax – A Compressed-First, Microcoded RISC-V CPU
- Minimax: A Compressed-First, Microcoded RISC-V CPU
ch32v003
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A Single-Cycle 64-Bit RISC-V Register File
There are some MCUs that use RV32E also - the CH32V003 [0] comes to mind.
[0] - https://github.com/openwch/ch32v003
- CH32V003 Printf Serial Diagnostic Output?
- nanoCH32V003 board
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2x 2538 SMD LED for the key switch. How do I make this workout?
Higher interest in the mechanical issue. Kailh box aren't made for 5050-equivalent-sized LEDs so the best I can come up with is placing them on a daughter board with some distance and just accepting losing some light. Probably will use a low-cost microcontroller and R2R leader (current sink) to make them addressable. Alternatively, make use of the 11 bit PWM and LC filter while the ADC forms the feedback loop. Currently unsure if I go with WCH CH32V003 (https://github.com/openwch/ch32v003) or Padauk MCUs. A couple of kHZ PWM should be fine but if I make a PCB I might as well just go all in with PWM-free.
What are some alternatives?
ZPUFlex - A highly-configurable and compact variant of the ZPU processor core
nanoCH32V305
picorv32 - PicoRV32 - A Size-Optimized RISC-V CPU
nanoCH32V203
Artix-7-HDMI-processing - Receiving and processing 1080p HDMI audio and video on the Artix 7 FPGA
nanoCH32V003
sulong - Obsolete repository. Moved to oracle/graal.
serv - SERV - The SErial RISC-V CPU
riscof
mini-rv32ima - A tiny C header-only risc-v emulator.
black-parrot - A Linux-capable RISC-V multicore for and by the world
learn-fpga - Learning FPGA, yosys, nextpnr, and RISC-V